Semiconductor Wafer Scribe-Line Layout for Low-Chip Dicing
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Solution Overview
Problem
Existing semiconductor wafer dicing processes cause undesirable effects such as sidewall chipping and dicing tool abrasive wear due to the separation through kerf regions containing auxiliary structures like process control monitor (PCM) structures and metal pads.
Innovation Solution
A semiconductor wafer design with auxiliary structures in scribe line regions electrically coupled to tungsten contact pads, which are thinner than the metallization structure in component positions, allowing for reduced defects during separation by ensuring the tungsten pads are uncovered and using the same fabrication processes for both.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If auxiliary structures are positioned in kerf regions for process monitoring and control, then manufacturing precision is improved, but sidewall chipping and dicing tool abrasive wear increase during separation
Solution Approach 1:
The patent extracts the auxiliary structures from the kerf regions and relocates them to scribe line regions. This separation removes the harmful interaction between auxiliary structures and the dicing blade during kerf separation, eliminating sidewall chipping and tool wear while preserving the process monitoring function in a safe location.
Solution Approach 2:
The patent introduces scribe line regions as intermediary zones between component positions and kerf regions. These scribe line regions serve as safe zones where auxiliary structures can be positioned without interfering with the dicing process, acting as a mediator that protects both the auxiliary structures and the separation process.
2Object-affected harmful factors
If auxiliary structures are removed from kerf regions before separation, then sidewall chipping and tool wear are reduced, but additional process steps are required
Solution Approach 1:
The patent performs preliminary action by positioning auxiliary structures in scribe line regions before the dicing process begins. This advance placement eliminates the need for post-fabrication removal steps, as the auxiliary structures are already in their final safe positions throughout the manufacturing process.
Solution Approach 2:
The scribe line regions serve multiple functions: they provide spacing between component positions, enable auxiliary structure placement for process monitoring, and act as safe zones during dicing. This multi-functionality consolidates several process requirements into a single structural feature, reducing overall process complexity.
3Manufacturing precision
If tungsten contact pads are made thinner to reduce defects during separation, then dicing quality is improved, but electrical coupling reliability may be compromised
Solution Approach 1:
The patent optimizes the thickness parameter of tungsten contact pads to a specific range (50nm to 1000nm) that balances two competing requirements: thin enough to minimize interference during dicing separation, yet thick enough to ensure reliable electrical coupling. This parameter optimization resolves the contradiction between dicing quality and electrical reliability.
Data Source
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AI summary
In an embodiment, a semiconductor wafer is provided that comprises a plurality of component positions with scribe line regions located at least one of adjacent to and between the component positions. The component positions comprise an active device structure. At least one auxiliary structure is positioned in one or more of the scribe line regions. The auxiliary structure is electrically coupled to an auxiliary contact pad comprising tungsten.