Wafer Sensitivity Data for Mask Writing Optimization

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Solution Overview

Problem

In lithography manufacturing systems, there is a lack of tight coupling between mask synthesis engines and mask writing devices, leading to errors in mask design translation that negatively impact IC chip quality due to the independence of these systems, where the mask writing device lacks knowledge of the IC chip design details and the impact of errors on the final product.

Innovation Solution

Generating and communicating sensitivity information from mask synthesis engines to mask writing devices, indicating the relative importance of different mask regions, allowing the mask writing device to optimize mask generation for higher quality wafers by adjusting writing algorithms for accuracy and speed based on sensitivity data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If mask synthesis engines and mask writing devices operate independently, then device complexity is reduced and ease of operation is improved, but manufacturing precision deteriorates due to errors in mask design translation

Engineering Contradiction:
Improveindependence of mask synthesis engine and mask writing deviceVSAvoidmask design translation accuracy
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent introduces sensitivity information as an intermediary data structure that bridges the mask synthesis engine and mask writing device. This sensitivity information contains convergence data indicating how changes in mask design affect the final wafer image, allowing the mask writing device to adjust its writing algorithms to compensate for translation errors while maintaining system independence

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a feedback mechanism where sensitivity information is generated by the mask synthesis engine and fed back to the mask writing device. This feedback loop enables the mask writing device to adapt its writing process based on the impact analysis of design changes, improving manufacturing precision without requiring tight coupling between systems

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If sensitivity information is generated and communicated between mask synthesis engine and mask writing device, then manufacturing precision is improved, but device complexity increases due to additional data processing requirements

Engineering Contradiction:
Improvewafer qualityVSAvoidcomputational processing complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the essential convergence information from the complex mask design data to create a simplified sensitivity information structure. This extracted data contains only the necessary information about how mask changes affect wafer outcomes, reducing the computational burden while maintaining the ability to improve manufacturing precision

Inventive Principle:
Principle #2Taking out (Extraction)

3Manufacturing precision

If mask writing device adjusts writing algorithms based on sensitivity information, then manufacturing precision is improved, but productivity decreases due to additional processing time

Engineering Contradiction:
Improvemask qualityVSAvoidcomputational runtime
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies local quality by using sensitivity information to adjust the writing algorithm only in regions where it is most needed. The convergence data identifies specific areas of the mask design that have high impact on wafer quality, allowing the mask writing device to concentrate computational resources on critical regions rather than uniformly processing the entire mask

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11657207B2Wafer sensitivity determination and communication
Publication Date: 2023.05.23 SYNOPSYS INC
  • US11657207B2 patent drawing
  • US11657207B2 patent drawing
  • US11657207B2 patent drawing

AI summary

A method comprises receiving an integrated circuit (IC) chip design, and generating, by one or more processors, a wafer image and a wafer target from the IC chip design. The method further comprises generating, by the one or more processors, sensitivity information based on a determination that the wafer image and the wafer target converge, and outputting the sensitivity information. The sensitivity information is associated with writing a mask written for the IC chip design.