Wafer Shape-Based Overlay Correction in Semiconductor Exposure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in maintaining overlay accuracy due to wafer distortion caused by film stress, which requires frequent and time-consuming overlay measurements and calibrations, leading to increased cycle times and load on measurement apparatuses.
Innovation Solution
An exposure apparatus with a surface shape measuring unit and controller that calculates fine wafer alignment residuals and conversion coefficients to generate correction information for real-time exposure processing, reducing the need for overlay measurements and shortening cycle times by converting shape change displacement residuals into fine wafer alignment residuals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If overlay measurement is performed frequently to ensure overlay accuracy, then overlay accuracy is improved, but cycle time is lengthened and load on measurement apparatus increases
Solution Approach 1:
The patent replaces the mechanical/optical overlay measurement system with a computational model-based system. Instead of physically measuring overlay errors on each wafer, the system uses a pre-established computational model that predicts overlay errors based on wafer shape parameters (such as curvature and radius of curvature) obtained from wafer shape measurement apparatus. This substitution eliminates the need for frequent overlay measurements while maintaining correction accuracy.
Solution Approach 2:
The patent performs preliminary calibration to establish a computational model that correlates wafer shape parameters with overlay errors before actual production. The model is created by collecting data from initial overlay measurements and wafer shape measurements, then establishing mathematical relationships between them. Once the model is established, it can be used for rapid prediction without requiring subsequent overlay measurements, thus shortening cycle time while maintaining accuracy.
2Manufacturing precision
If overlay measurement is performed on multiple wafers to account for shape differences, then correction accuracy is improved, but load on overlay measurement apparatus increases
Solution Approach 1:
The patent replaces the overlay measurement apparatus with a wafer shape measurement apparatus for the actual measurement process. The wafer shape measurement system measures parameters such as curvature and radius of curvature, which are then fed into the computational model to predict overlay errors. This substitution reduces the load on the overlay measurement apparatus while maintaining correction accuracy through the model-based prediction approach.
Solution Approach 2:
The patent creates a universal computational model that can handle different wafer shapes and conditions. The model is calibrated once to work across multiple wafers with varying shapes, eliminating the need to perform separate overlay measurements for each wafer. This multi-functional approach allows the system to adapt to different wafer conditions while using a single measurement and correction system.
Data Source
AI summary
According to one embodiment, a controller calculates wafer alignment residuals from results of wafer alignment measurement and calculates shape change displacement residuals from the surface shape of a wafer. Further, the controller calculates first conversion coefficients that are ratios of the wafer alignment residuals to the shape change displacement residuals and generates fine wafer alignment residual data by using the first conversion coefficients. Furthermore, the controller generates correction information in which first correction values at the time of the exposure processing are calculated for every shot on the wafer by using the fine wafer alignment residual data. Then, the controller controls exposure processing in an exposure unit by using the correction information corresponding to the shot of the wafer.


