Wafer Sidewall Protection Layer for Moisture-Resistant Bonding
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Solution Overview
Problem
The degradation of low-k dielectric layers and metal features in device wafers during the wafer bonding process is a significant challenge due to exposure to detrimental chemicals and moisture.
Innovation Solution
A high-density sidewall protection layer is formed using materials denser than silicon oxide, which effectively blocks chemicals and moisture, reducing degradation and preventing peeling of layers during processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional sidewall protection layer is used during wafer bonding, then the structure is simple and easy to manufacture, but the low-k dielectric layers and metal features degrade due to exposure to chemicals and moisture
Solution Approach 1:
The sidewall protection layer is formed as a composite structure comprising a first material layer (such as silicon oxide or silicon nitride) and a second material layer (such as parylene or polyimide). This composite structure provides superior protection against chemical and moisture exposure during wafer bonding while maintaining structural integrity of the low-k dielectric layers and metal features.
Solution Approach 2:
The invention changes the material parameters of the sidewall protection layer by selecting materials with specific properties - the first material layer provides inorganic protection while the second material layer provides organic protection. This parameter change in material composition enables enhanced reliability without excessive complexity.
2Strength
If no sidewall protection layer is used, then the device structure remains simple, but the layers peel during processing due to lack of protection
Solution Approach 1:
The composite sidewall protection layer with two different materials provides enhanced adhesion strength during processing. The first material layer (inorganic) and second material layer (organic) work together to prevent peeling of the low-k dielectric layers and metal features, addressing the strength requirement while keeping the structure relatively simple.
3Reliability
If a thick protection layer is used to fully protect the sidewalls, then protection effectiveness increases, but the horizontal portion overlapping the wafer requires additional removal steps
Solution Approach 1:
The invention optimizes the thickness parameter of the sidewall protection layer to be sufficient for protection but not excessive. The two-layer composite structure allows for controlled deposition where each layer contributes to the overall protection, achieving effective protection while minimizing the need for extensive removal of horizontal portions.
Solution Approach 2:
The protection layer is applied with different considerations for different regions - the vertical sidewall regions receive full protection while the horizontal portions overlapping the wafer are minimized. This local quality approach ensures protection where needed (sidewalls) while reducing unnecessary material that would require removal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The high-density sidewall protection layer significantly reduces the degradation of low-k dielectric layers and metal features, ensuring the integrity and performance of the device wafer during the bonding and subsequent processing stages.
Implementation Method 1
The high-density material has good blocking ability for preventing detrimental chemicals and moisture from penetrating through
Implementation Method 2
depositing a sidewall protection layer contacting a sidewall of the device wafer, wherein the depositing the sidewall protection layer comprises depositing a high-density material in contact with the sidewall of the device wafer
Data Source
AI summary
A method includes bonding a first wafer to a second wafer, performing a trimming process on the first wafer, and depositing a sidewall protection layer contacting a sidewall of the first wafer. The depositing the sidewall protection layer includes depositing a high-density material in contact with the sidewall of the first wafer. The sidewall protection layer has a density higher than a density of silicon oxide. The method further includes removing a horizontal portion of the sidewall protection layer that overlaps the first wafer, and forming an interconnect structure over the first wafer. The interconnect structure is electrically connected to integrated circuit devices in the first wafer.


