Semiconductor Die Singulation with Staged Etch, Thinning, and Final Cut
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Solution Overview
Problem
The existing semiconductor manufacturing process faces challenges in enhancing yield and increasing usable area on wafers due to inefficiencies in the cutting process, which affects the cost and efficiency of semiconductor device production.
Innovation Solution
A method involving a first cutting step, a thinning step, and a second cutting step is performed on semiconductor wafers to form semiconductor dies, where the first cutting step creates openings in the scribe lane region, and the thinning step removes portions between these openings, followed by a second cutting step to separate the dies, optimizing the process yield and usable area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single cutting step is performed on the semiconductor wafer, then the manufacturing process is simple, but the manufacturing yield is reduced and the usable area on the wafer is decreased
Solution Approach 1:
The cutting process is divided into multiple sequential steps: first cutting step to form initial openings, thinning step to remove material between openings, and second cutting step to complete separation. This segmentation allows each step to be optimized independently, improving overall yield while managing complexity through structured progression
Solution Approach 2:
The first cutting step creates preliminary openings in the scribe lane region before the final separation. This preliminary action prepares the wafer structure in advance, enabling more efficient material removal during the thinning step and reducing stress during final cutting, thereby improving yield
2Area of stationary object
If the cutting lane area is increased to accommodate standard cutting processes, then the cutting process is reliable, but the usable area on the wafer is reduced
Solution Approach 1:
The cutting openings extend in the thickness direction of the wafer, utilizing the vertical dimension to create separation paths. This dimensional approach allows cutting lanes to be narrower while still achieving effective die separation, thereby increasing the usable area on the wafer surface without compromising cutting reliability
3Strength
If conventional cutting methods are used, then the process is straightforward, but stress damage occurs and bonding strength is reduced
Solution Approach 1:
The cutting openings are positioned specifically in the scribe lane region between dies, creating localized separation zones. This local quality approach concentrates the cutting action where it is most needed for separation while preserving the integrity of the die regions, thereby enhancing bonding strength without requiring complex overall process changes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves manufacturing yield and increases the usable area on the wafer by effectively separating semiconductor dies with distinct side surface roughness, enhancing the bonding strength and reducing stress damage, thus improving the overall efficiency of semiconductor device production.
Implementation Method 1
A first cutting step is configured for forming first openings in the semiconductor wafer by etching the semiconductor wafer
Implementation Method 2
The portion of the semiconductor wafer located between each of the first openings and the back surface of the semiconductor wafer is removed by the thinning step
Implementation Method 3
The second cutting step is performed after the thinning step for forming second openings. Each of the second openings penetrates through the semiconductor wafer for separating the semiconductor dies
Data Source
AI summary
A manufacturing method of a semiconductor device includes the following steps. A singulation process is performed to a semiconductor wafer for forming semiconductor dies and includes a first cutting step, a thinning step, and a second cutting step. The first cutting step is configured to form first openings in the semiconductor wafer by etching. A portion of the semiconductor wafer is located between each first opening and a back surface and removed by the thinning step. Each first opening penetrates through the semiconductor wafer after the thinning step. The second cutting step is configured to form second openings. Each second opening penetrates through the semiconductor wafer for separating the semiconductor dies. A semiconductor die includes two first side surfaces opposite to each other and two second side surfaces opposite to each other. A roughness of each first side surface is different from a roughness of each second side surface.