Semiconductor Wafer Stacked Dicing Region for Straight Cleavage
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Solution Overview
Problem
The laser dicing technique for semiconductor wafers results in low straightness of cleavage lines, leading to meandering division lines and potential cracks in semiconductor chips due to the lack of linearity in the dicing process.
Innovation Solution
A semiconductor wafer design with alternating stacks of first and second material films in the dicing region, where the second stacked body induces cleavage along its interface with the interlayer insulating film, maintaining linearity and preventing cracks by forming a guard ring around chip regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If laser dicing technique is used to cleave semiconductor wafer, then dicing process can be performed, but cleavage line straightness deteriorates causing meandering division lines
Solution Approach 1:
The patent applies preliminary action by forming a cleavage induction film pattern on the semiconductor wafer before the dicing process. This pre-formed pattern guides the laser-induced cleavage to follow a straight path, preventing meandering division lines during the actual dicing operation.
Solution Approach 2:
The patent introduces a cleavage induction film as an intermediary layer between the semiconductor substrate and the laser dicing process. This film acts as a mediator that directs the cleavage propagation, ensuring straight division lines while maintaining the effectiveness of the laser dicing technique.
2Ease of manufacture
If laser modification is performed on semiconductor wafer, then dicing can be enabled, but division line curvature increases during thinning process causing cracks to reach device region
Solution Approach 1:
The patent applies preliminary action by pre-forming a cleavage induction film pattern that maintains division line straightness throughout the thinning process. This pre-established guidance structure prevents the division line from curving during subsequent processing steps, thereby preventing cracks from reaching the device region and maintaining chip integrity.
Solution Approach 2:
The cleavage induction film serves as an intermediary that stabilizes the cleavage path during the thinning process. It mediates between the laser modification and the final cleavage outcome, ensuring that the division line remains straight and does not curve toward the device region, thus protecting chip reliability.
3Productivity
If material film division follows laser modified portion, then dicing can proceed, but division line meandering occurs reducing manufacturing precision
Solution Approach 1:
The patent applies preliminary action by forming a cleavage induction film pattern before dicing, which pre-establishes the desired division line path. This allows the material film to follow a predetermined straight trajectory during dicing, maintaining both high productivity and manufacturing precision without meandering.
Solution Approach 2:
The cleavage induction film acts as an intermediary that guides the material film division process. It ensures that the division line follows a straight, predetermined path while maintaining dicing throughput, thereby resolving the conflict between productivity and division line accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution ensures linear cleavage in the dicing region, reducing the likelihood of cracks in semiconductor chips and maintaining the integrity of the chip regions during the dicing process.
Implementation Method 1
A laser dicing technique is a method using a laser to modify the inside of a semiconductor wafer to cleave the semiconductor wafer from a modified portion as the starting point
Data Source
AI summary
A semiconductor wafer according to the present embodiment includes a plurality of semiconductor chip regions and a division region. The plurality of semiconductor chip regions have a semiconductor element. The division region is provided between the semiconductor chip regions adjacent to each other. A first stacked body is provided on the division region. The first stacked body is configured with a plurality of first material films and a plurality of second material films alternately stacked.