Wafer Stencil Recess Design for Precise Die Attach Thickness
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Solution Overview
Problem
Conventional die attach stencil thickness accuracy is inadequate for thin semiconductor packages like QFN and SOT, leading to increased manufacturing costs and cycle times, as well as challenges in achieving precise adhesive thickness for different package types.
Innovation Solution
A wafer back grind or etch process is used to create a 'wafer stencil' with a recessed inner circumference and a raised outer ring, allowing for precise control of B-stage epoxy thickness without the need for multiple stencils, enabling flexible and accurate die attach material application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional stencils are used to control die attach material thickness, then the process is simple to implement, but the thickness accuracy is insufficient for thin packages
Solution Approach 1:
The wafer back surface is transformed into a multi-functional element that serves both as the substrate for semiconductor devices and as a stencil for controlling adhesive thickness. By creating recesses directly in the wafer back surface, the same wafer structure performs dual functions: supporting the semiconductor devices and precisely controlling the die attach material thickness, thereby eliminating the need for separate conventional stencils and achieving high precision for thin packages.
Solution Approach 2:
The stencil function is extracted from a separate component and integrated directly into the wafer back surface through recess formation. This extraction eliminates the need for external stencils and their associated complexity, while the recesses in the wafer back surface directly define the adhesive thickness with high precision suitable for thin packages.
2Adaptability or versatility
If multiple stencils are used for different package thicknesses, then various package types can be accommodated, but manufacturing costs and cycle time increase
Solution Approach 1:
A single wafer back surface with selectively formed recesses serves as a universal stencil system that can accommodate different package types and thicknesses. By controlling the depth and distribution of recesses in the wafer back surface, the same wafer structure adapts to various package requirements without requiring multiple separate stencils, thereby maintaining versatility while improving productivity.
Solution Approach 2:
The wafer back surface is segmented into multiple recesses with different depths and configurations to accommodate different package types. Each recess is precisely formed to match the specific thickness requirements of different packages, allowing a single wafer to function as multiple specialized stencils, thus achieving adaptability without increasing manufacturing complexity or cycle time.
3Adaptability or versatility
If multiple stencils are used for different package thicknesses, then various package types can be accommodated, but manufacturing costs increase
Solution Approach 1:
The wafer back surface serves as a universal stencil system that eliminates the need for multiple expensive conventional stencils. By forming recesses directly in the wafer material during the manufacturing process, the system achieves adaptability for different package types without incurring additional stencil manufacturing costs, as the wafer itself becomes the precision thickness-controlling element.
Solution Approach 2:
The stencil function is merged with the wafer structure by forming recesses in the wafer back surface. This consolidation eliminates the need for separate stencil components and their associated manufacturing costs. The wafer back surface recesses are formed using standard semiconductor manufacturing techniques, integrating the thickness control function into the existing wafer fabrication process and significantly reducing overall manufacturing costs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method provides improved thickness accuracy and reduced manufacturing costs by eliminating the need for multiple stencils, enhancing the processing of thin packages with precise adhesive application and improved wafer handling.
Implementation Method 1
A wafer back grind or etch process is used to create a 'wafer stencil' with a recessed inner circumference
Implementation Method 2
A wafer back grind or etch process is used to create a 'wafer stencil'
Data Source
AI summary
A method of applying a die attach material includes forming a wafer stencil by selectively removing on the back side of a wafer including a plurality of semiconductor die having an active top side a predetermined depth to form a recess having an inner circumference while not removing an outer most circumference of the wafer. The recess is filled with a B-stage adhesive material. The wafer is singulated to form a plurality singulated semiconductor die. The singulated semiconductor die is die attached back side down to a package substrate, and then the B-stage adhesive material is cured. The B-stage adhesive material across its full area generally has a minimum thickness of at least 20 μm and a maximum thickness range of 6 μm.


