Wafer Stitching Method for Exposure Process
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Solution Overview
Problem
The existing semiconductor stitching processes face challenges in maintaining a sufficient process window, leading to deformation of photoresist patterns at stitching junctions, which impede the formation of anticipated photoresist patterns.
Innovation Solution
A stitching method for an exposure process is introduced, where a wafer with interposer regions is exposed using alternating first and second shot regions, with stitching regions formed by overlapping these regions, ensuring they are not located in logic chip regions with complex circuit patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If stitching processes are performed with constrained process window, then exposure time and resource usage are reduced, but photoresist pattern deformation occurs at stitching junctions
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different regions on the wafer. Stitching regions are specifically identified and excluded from logic chip regions, allowing optimized exposure parameters to be applied locally at stitching junctions while maintaining standard processing for logic regions. This localized approach ensures pattern fidelity at critical stitching areas without compromising overall productivity.
Solution Approach 2:
The patent segments the exposure process into distinct first and second exposure processes with different photomasks. The first exposure process forms first shot regions and the second exposure process forms second shot regions, with stitching regions specifically identified between them. This segmentation allows independent optimization of each exposure process for its specific requirements, improving stitching quality.
2Measurement precision
If stitching regions are formed by overlapping first and second shot regions, then pattern alignment is improved, but process complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-defining stitching regions before the actual exposure process. The stitching regions are identified in advance as specific areas where first and second shot regions will overlap, allowing the system to prepare appropriate exposure parameters and settings beforehand. This preliminary identification simplifies the execution phase by providing clear guidance on where precise alignment is critical.
Solution Approach 2:
The patent uses copying by creating overlapping regions where the second shot regions are positioned to overlap with first shot regions. This overlapping copy approach ensures that stitching patterns are reproduced consistently across the boundary between different exposure fields, maintaining alignment accuracy through the replication of pattern information in the overlap zone.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively improves the process window of the stitching process, allowing for the attainment of the anticipated photoresist pattern after development, by avoiding deformation at stitching junctions.
Implementation Method 1
A plurality of first exposure processes are performed on the photoresist layer by applying a first photomask to form a plurality of first shot regions in the photoresist layer
Data Source
AI summary
A stitching method for an exposure process includes following steps. A wafer is provided. The wafer includes interposer regions, each of which includes a logic chip region, a first memory chip region, and a second memory chip region. The logic chip region is located between the first and second memory chip regions. A photoresist layer is formed on the wafer. First exposure processes are performed on the photoresist layer by applying a first photomask to form first shot regions in the photoresist layer. Second exposure processes are performed on the photoresist layer by applying a second photomask to form second shot regions in the photoresist layer. The first shot regions and the second shot regions are arranged alternately in a first direction. The first shot regions and the second shot regions are overlapped to form stitching regions, each of which is not located in the logic chip region.