Wafer Backside Stress Compensation for Overlay and Bow Control
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Solution Overview
Problem
Integrated circuits face complex wafer bow and in-plane distortion due to multi-layer films, limiting the adoption of higher-stress films that offer beneficial properties like better etch selectivity, and hindering the scaling required for advanced semiconductor devices such as 3D-NAND and 3D-DRAM.
Innovation Solution
A method involving blanket film deposition and field-level film modification on the back side of a semiconductor wafer to reduce distortion, using techniques like physical vapor deposition (PVD) and ion or photon implantation to compensate for low and high frequency components of wafer distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If higher-stress films are used to achieve better etch selectivity, then etch selectivity is improved, but wafer distortion increases
Solution Approach 1:
The patent applies different stress characteristics to different regions of the wafer by depositing films with varying properties in different fields. The system measures distortion in each field and deposits films with tailored stress characteristics to compensate for local distortion variations, enabling the use of higher-stress films for etch selectivity while maintaining overall wafer flatness through regional compensation.
Solution Approach 2:
The patent uses composite film structures combining multiple materials with different stress properties. By stacking films with opposing stress characteristics (tensile and compressive), the system achieves the desired etch selectivity from high-stress films while the composite structure compensates for net stress-induced distortion, resolving the contradiction between etch selectivity and wafer flatness.
2Adaptability or versatility
If multi-layer films are deposited to increase functional density, then device complexity increases, but wafer bow and in-plane distortion become more complex and difficult to address
Solution Approach 1:
The patent divides the wafer into multiple fields and measures distortion independently in each field. By segmenting the wafer surface and treating each region separately with field-specific film deposition, the system manages complex multi-layer film-induced distortions through localized compensation, making the overall complex distortion problem manageable through decomposition into smaller field-level problems.
Solution Approach 2:
The patent implements a dynamic, adaptive process where distortion is measured after each deposition step and the subsequent film deposition parameters are adjusted in real-time based on measured distortion. This dynamic feedback approach enables the system to handle increasingly complex multi-layer film structures by continuously adapting compensation strategies rather than using fixed processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces wafer distortion effectively, enabling better overlay and device yield by neutralizing film stress and compensating for complex bow and in-plane distortions, thus facilitating the scaling of advanced semiconductor devices.
Implementation Method 1
A blanket film is deposited on a back side of a wafer having at least one field formed on a front side. The at least one field comprises a film, the wafer having a first distortion.
Implementation Method 2
One or more of ions or photons are implanted into the back side of the wafer to compensate for the high frequency component.
Data Source
AI summary
Provided are methods of reducing the stress of a semiconductor wafer. A wafer map of a free-standing wafer is created using metrology tools. The wafer map is then converted into a power spectral density (PSD) using a spatial frequency scale. The fundamental component of bow is then compensated with a uniform film, e.g., silicon nitride (SiN), deposited on the back side of the wafer.