Semiconductor Wafer Stress Relief Layer for Crack Prevention
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Solution Overview
Problem
The existing methods for fabricating semiconductor devices face challenges in minimizing stress during the expanding process, which can lead to cracks and incorrect separation of semiconductor chip regions, particularly due to the generation of damaged films during grinding and dicing, resulting in damage to the IC pattern and reduced binding force between the supporting film and the wafer.
Innovation Solution
A method involving the use of a stress relief layer deposited via a plasma process, which molecularly bonds with the wafer to reduce tensile stress and prevent crack propagation, allowing for accurate separation of semiconductor chip regions along the cutting pattern during the expanding process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a supporting film is bonded to a semiconductor wafer after grinding, then the wafer can be handled and processed, but damaged films generated during grinding become seeds for cracks that propagate during the expanding process
Solution Approach 1:
A stress relief layer is formed on the back surface of the wafer before the expanding process. This preliminary action prevents stress concentration at the damaged film locations during expansion, thereby preventing crack propagation while maintaining the supporting film's functionality.
Solution Approach 2:
The stress relief layer acts as an intermediary between the supporting film and the damaged film regions. It absorbs and distributes the stress during expansion, preventing the damaged film from becoming a crack initiation site while allowing the supporting film to maintain its structural role.
2Productivity
If the wafer is expanded to separate semiconductor chip regions, then individual chips can be obtained, but stress during expansion causes cracks and damage to IC patterns
Solution Approach 1:
The stress relief layer is formed in advance on the back surface of the wafer before expansion. This preliminary protective measure allows the wafer to be expanded efficiently into individual chips while the stress relief layer prevents stress-induced cracks and IC pattern damage during the separation process.
3Strength
If the supporting film is bonded directly to the ground wafer surface, then bonding is achieved, but the binding force is reduced due to stress and damaged films
Solution Approach 1:
The stress relief layer serves as an intermediary layer between the supporting film and the wafer. This intermediary structure improves the bonding interface by distributing stress evenly, preventing damaged film regions from compromising the bond, and enhancing the overall binding force and bonding quality.
Solution Approach 2:
The formation of the stress relief layer changes the mechanical parameters of the wafer-back surface interface. It modifies the stress distribution characteristics, reducing stress concentration at damaged regions and improving the bonding parameters between the supporting film and wafer.
4Manufacturing precision
If grinding is performed to thin the wafer, then the wafer achieves the required thickness, but damaged films are generated on the wafer surface
Solution Approach 1:
The stress relief layer converts the harmful effect of damaged films into a beneficial outcome. By forming this layer on the back surface, the damaged regions on the front surface are compensated for, and the stress relief layer's presence actually improves the overall structural integrity by preventing crack propagation from the damaged areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress relief layer effectively minimizes stress-induced damage, ensuring precise separation of semiconductor chip regions and enhancing the binding force between the stress relief layer and the supporting film, thereby improving the reliability and yield of the semiconductor device fabrication process.
Implementation Method 1
performing a post-treatment to the stress relief layer, using a plasma process
Implementation Method 2
molecularly bonds with the wafer to reduce tensile stress
Data Source
AI summary
A method for fabricating a semiconductor device includes: providing a first wafer including a base substrate having a first surface and a second surface facing each other, and an element region disposed on the first surface of the base substrate, in which the first wafer includes a first semiconductor chip region and a second semiconductor chip region adjacent to each other, each including a portion of the base substrate and a portion of the element region; forming a cutting pattern in the base substrate between the first semiconductor chip region and the second semiconductor chip region; grinding a part of the base substrate to form a second wafer from the first wafer; forming a stress relief layer on the second surface of the ground base substrate; and expanding the second wafer to separate the first semiconductor chip region and the second semiconductor chip region from each other.