Wafer Surface Measurement Error Correction Using Interferometry
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Solution Overview
Problem
Conventional metrology systems are inadequate for accurately measuring the geometry of patterned wafers due to complex phase maps and surface errors introduced by patterned structures, which affect measurement accuracy and require improved methods for error reduction while preserving wafer shape and pattern information.
Innovation Solution
The system employs imaging devices to acquire front and back surface images, calculates phase and height maps, identifies artifact regions through filtering and convex hull analysis, generates a reference height map, and applies surface height corrections to produce an error-corrected map, ensuring accurate wafer geometry measurements by reducing surface errors and maintaining pattern structure integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional metrology systems are used to measure patterned wafers, then measurement process is simple, but measurement precision deteriorates due to complex phase maps and surface errors introduced by patterned structures
Solution Approach 1:
The patent segments the measurement process into distinct phases: acquiring phase maps, identifying artifact regions through filtering and convex hull analysis, separating artifact regions from valid measurement regions, and performing differential interference contrast (DIC) analysis only on valid regions. This segmentation allows conventional metrology systems to achieve high measurement precision by processing only relevant data while excluding artifact-contaminated areas.
Solution Approach 2:
The patent introduces an intermediary processing layer that includes filtering operations, convex hull analysis, and artifact region identification algorithms. This intermediary layer acts as a mediator between the raw phase map data and the final measurement results, eliminating surface errors and artifacts before final analysis, thereby enabling accurate measurements using conventional hardware systems.
2Measurement precision
If artifact regions are excluded from measurement, then measurement precision improves, but loss of information increases due to removal of potentially valid data regions
Solution Approach 1:
The patent implements feedback through iterative artifact region identification and validation processes. The system performs filtering, identifies artifact regions using convex hull analysis, validates these regions against multiple criteria, and only excludes regions that are confirmed to contain artifacts. This feedback mechanism ensures that valid measurement data is preserved while artifact-contaminated regions are removed, maintaining measurement precision without unnecessary information loss.
Solution Approach 2:
The patent applies partial action by performing measurements on only the valid, artifact-free regions of the wafer surface rather than attempting to process the entire surface. By focusing computational resources and analysis on the subset of valid regions identified through filtering and artifact detection, the system achieves high measurement precision where needed without wasting resources on artifact-contaminated areas, thereby optimizing the balance between precision and information retention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces surface errors and enhances measurement accuracy for patterned wafers, allowing for improved monitoring and control of wafer fabrication processes, even when only one side of the wafer is measured, and supports efficient surface error correction and phase map analysis.
Implementation Method 1
Systems and methods for effective pattern wafer surface measurement and analysis using interferometry tool
Data Source
AI summary
Systems and methods for providing improved wafer geometry measurements are disclosed. A wafer geometry measurement system may utilize techniques that enable the wafer geometry measurement system to identify and reduce wafer surface errors caused by structures such as patterns on the wafers being measured. The wafer geometry measurement system may also utilize techniques that enable the wafer geometry measurement system to accurately reconstruct patterned wafer surfaces.