Wafer-Based Surface Mount Device With Wrap-Around Connection

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Solution Overview

Problem

Current surface mount packaging technologies face challenges in minimizing physical footprint while maintaining cost-effectiveness and functionality, particularly in accommodating increasing processing and storage demands in electronic devices, as they often result in larger sizes and higher costs due to wire bonding and through-silicon-via complexities.

Innovation Solution

The development of a surface mount device with a wrap-around connection for terminal metallization, which includes an encapsulation layer and end-termination cap, allowing for a smaller form factor and cost-effective fabrication by dicing, backgrinding, and singulating semiconductor wafers, and forming wrap-around connections to reduce physical size and prevent component tilting during assembly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonding and through-silicon-via technologies are used to achieve electrical connections, then reliable electrical connection is achieved, but device size and manufacturing cost increase

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent removes the need for wire bonding and through-silicon-via technologies by implementing a wrap-around connection structure where terminal metallization extends from the front surface, wraps around the sidewalls, and connects to the back surface, eliminating complex intermediate connection elements

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The connection structure transitions from traditional planar or vertical through-silicon connections to a three-dimensional wrap-around configuration that utilizes the sidewall surface, creating electrical connections across multiple spatial dimensions without increasing overall device footprint

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If wire bonding and through-silicon-via technologies are used to achieve electrical connections, then reliable electrical connection is achieved, but manufacturing cost increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent eliminates the need for expensive wire bonding processes and through-silicon-via fabrication steps by using a wrap-around terminal metallization structure that can be integrated into standard semiconductor manufacturing workflows

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The terminal metallization structure serves multiple functions simultaneously: it provides electrical connections, defines device boundaries, and enables wrap-around bonding, replacing multiple separate manufacturing steps with a single integrated structure

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If traditional packaging technologies are used, then functionality is maintained, but physical footprint increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidphysical footprint
Core Design Contradiction:
Adaptability or versatilityVSArea of moving object

Solution Approach 1:

The wrap-around connection structure utilizes the vertical sidewall dimension to route connections, allowing the device to maintain full functionality while minimizing the horizontal footprint on the substrate

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10211172B2Wafer-based electronic component packaging
Publication Date: 2019.02.19 MAXIM INTEGRATED PROD INC
  • US10211172B2 patent drawing
  • US10211172B2 patent drawing
  • US10211172B2 patent drawing

AI summary

A surface mount device includes at least one semiconductor device including an exposed top metal, an encapsulation layer partially encapsulating the at least one semiconductor device, and at least one end-termination cap on the surface mount device resulting in an electrical connection from a first side of the surface mount device to a second side of the surface mount device. In implementations, one process for fabricating the surface mount device includes dicing a finished device wafer in a scribe-line region, applying tape to a first side of the finished device wafer, backgrinding a second side of the finished device wafer, encapsulating the second side of the finished device wafer with an encapsulation layer, singulating the finished device wafer, and forming at least one wrap-around connection from a first side of the surface mount device to a second side of the surface mount device.