Wafer Test Cell Array for Faster Defect Localization
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Solution Overview
Problem
Existing semiconductor wafer manufacturing processes face challenges in identifying and pinpointing defects in integrated circuits due to inefficiencies in failure mode analysis, leading to yield losses and reliability issues.
Innovation Solution
A test structure on a semiconductor wafer is designed with a test array comprising cells under test, input and output pads, and well input regions, allowing for precise identification of abnormal cells through current measurement, facilitating physical failure analysis (PFA) to determine the root cause of defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional failure mode analysis methods are used to test semiconductor wafers, then the testing process can identify defects, but the process is inefficient and time-consuming, leading to yield losses
Solution Approach 1:
The test structure is divided into multiple test cells arranged in an array, where each cell can be independently tested. This segmentation allows parallel testing of multiple cells simultaneously, significantly improving testing efficiency and reducing the time required to identify defects across the semiconductor wafer.
Solution Approach 2:
The test structure includes preliminary test cells with known good configurations that are tested before the actual device cells. This preliminary action establishes baseline measurements and validates the testing methodology, enabling faster and more accurate defect identification in subsequent tests without requiring extensive analysis time.
2Measurement precision
If comprehensive testing of all cells is performed to ensure high detection accuracy, then defect identification precision improves, but the testing complexity and resource requirements increase
Solution Approach 1:
The test structure employs different cell types with specific local qualities - some cells are designed with particular transistor configurations or interconnect patterns that make them sensitive to specific defect modes. This local quality differentiation allows targeted detection of different defect types without requiring every cell to be maximally complex, maintaining overall simplicity while achieving comprehensive detection accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate detection of defects in integrated circuits by measuring current flow through turned-on and abnormal cells, enhancing the efficiency of failure mode analysis and improving the yield and reliability of semiconductor wafers.
Implementation Method 1
measuring a current flowing through the turned-on cell
Data Source
AI summary
A test structure on a wafer is provided. The test structure includes a plurality of cells under test, a plurality of first input pads, and a plurality of second input pads. The cells are arranged in rows and columns of a test array. Each of the first input pads is coupled to the cells in respective column of the test array. Each of the second input pads is coupled to the cells in respective row of the test array. one of the cells which is coupled to one of the first input pads and one of the second input pads is turned on, and a current flowing through the turned-on cell is measured.