Wafer Test Circuit With Feedback Current Division for EPM
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Solution Overview
Problem
The existing electrical parameter monitoring (EPM) techniques for semiconductor apparatuses face geographical limitations and increased test time due to the direct probing scheme used in wafer-level testing.
Innovation Solution
A test circuit for semiconductor apparatuses is introduced, featuring a first resistor, a second resistor, and a feedback loop circuit. The first resistor is coupled between a pad and a test element, while the second resistor is connected in parallel. The feedback loop circuit compares voltages applied to both resistors, allowing for efficient current division and reduced test time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If direct probing scheme is used for wafer-level EPM, then test coverage is achieved, but test time increases and geographical limitations occur
Solution Approach 1:
The patent introduces an intermediary test circuit structure with resistors and feedback loops between the probing pads and test elements. This intermediary circuit enables indirect testing through voltage division and feedback mechanisms, eliminating the need for direct probing of each test element while maintaining comprehensive test coverage and reducing test time.
2Reliability
If direct probing scheme is used for wafer-level EPM, then test coverage is achieved, but geographical limitations of test pattern occur
Solution Approach 1:
The patent creates a universal test circuit structure that can be implemented across different wafer locations and test patterns. The standardized circuit topology with resistors and feedback loops provides multi-functional capability to test various electrical parameters (voltage, current, resistance) at different geographical locations on the wafer, eliminating geographical limitations.
3Measurement precision
If feedback loop circuit with voltage comparison is implemented, then test accuracy is improved, but circuit complexity increases
Solution Approach 1:
The patent implements feedback loops that compare voltages across different resistors and adjust the test circuit operation accordingly. This feedback mechanism improves measurement precision by enabling accurate voltage and current measurements through comparison, while the systematic feedback structure maintains manageable circuit complexity through standardized design patterns.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed test circuit overcomes geographical limitations and reduces test time by enabling efficient current division and accurate voltage comparison, thereby enhancing the effectiveness of wafer-level EPM.
Implementation Method 1
a first resistor R1 and a second resistor R2. The first resistor R1 may be coupled to a second pad PAD2. The second resistor R2 may be coupled to the second pad PAD2 in parallel with the first resistor R1.
Implementation Method 2
a differential amplifier configured to compare a first voltage corresponding to the first current path and a second voltage corresponding to the second current path
Implementation Method 3
a feed-back transistor coupled between the second resistor and a ground and configured to form a negative feed-back loop according to an output of the differential amplifier
Data Source
AI summary
A test circuit of a semiconductor apparatus includes a first resistor, a second resistor and a feed-back loop circuit. The first resistor is coupled between a pad and a test element. The second resistor is coupled to the first resistor in a parallel manner. The feed-back loop circuit is configured to feed a result back to the second resistor, the result being one of comparing a first voltage and a second voltage with each other, the first voltage and the second voltage being applied respectively to the first resistor and the second resistor.