Wafer-Test Prediction of Future Electronic Component Faults
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Solution Overview
Problem
Existing methods for predicting semiconductor component failures during final test are hindered by unknown process constraints, such as packaging, leading to unreliable classification labels and increased costs due to unforeseen component failures.
Innovation Solution
A method using a trained machine learning model, specifically employing an Expectation-Maximization algorithm and boosted trees, to predict potential failures based on wafer test data, accounting for subsequent processes like packaging, and correcting noisy labels to improve prediction accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If final test classification labels are used to predict component failures, then prediction can be performed, but the labels are unreliable due to unknown process constraints such as packaging causing additional failures
Solution Approach 1:
The patent applies preliminary action by performing wafer test predictions before the actual final test and packaging processes occur. The machine learning model predicts future errors at the wafer test stage, allowing early identification of components that will fail during subsequent packaging or final test, thereby preventing unreliable final test labels from being generated in the first place
Solution Approach 2:
The patent introduces an intermediary machine learning model that acts as a mediator between wafer test data and final test outcomes. This model accounts for unknown process constraints by learning the relationship between initial component characteristics and future failures, effectively bridging the gap caused by unobservable packaging and process variables
2Measurement precision
If unknown process constraints like packaging are accounted for in prediction, then prediction accuracy improves, but the complexity of the prediction model increases
Solution Approach 1:
The machine learning model performs self-service by automatically learning and adapting to unknown process constraints from historical data without requiring explicit programming or manual configuration. The model autonomously identifies patterns related to packaging and process-induced failures, reducing the need for complex manual modeling of each process step
Solution Approach 2:
The patent applies parameter changes by transforming the prediction approach from directly modeling complex process constraints to predicting error probabilities based on observable wafer test parameters. The machine learning model changes the parameter space from process-specific variables to component-level electrical and functional test characteristics, simplifying the model while maintaining accuracy
3Reliability
If components are tested at final test stage, then actual failures are detected, but costs increase due to unnecessary testing of components that would fail during packaging
Solution Approach 1:
The patent applies preliminary action by performing error prediction at the wafer test stage, before components undergo expensive packaging and final test processes. Components predicted to fail during packaging are identified early, allowing manufacturers to avoid the cost of packaging and final testing components that would ultimately fail, thereby reducing energy loss and manufacturing costs
Solution Approach 2:
The patent applies preliminary anti-action by taking preventive measures at wafer test to counteract future failures that would occur during packaging. By predicting and flagging components destined for failure before they undergo subsequent processes, the system prevents waste of resources on components that cannot be salvaged, effectively acting in advance to neutralize the harmful effect of unknown process constraints
Data Source
Figure 1~2
AI summary
The invention relates to a method (100) for predicting a future fault of an electronic component (1), comprising the following steps: - providing (101) test data of the electronic component (1), wherein the test data result from an electrical and/or mechanical functional test of the electronic component (1) as part of a wafer test, - determining (102) a predicted presence of a fault at the time of the functional test on the basis of the provided test data using a trained machine learning model, wherein the trained machine learning model models at least one subsequent process after the wafer test, wherein the predicted presence of the fault takes into account a probability that a fault of the electronic component (1) will be caused by the at least one subsequent process, - predicting (103) the future fault on the basis of the determined predicted presence of the fault.Furthermore, the invention relates to a computer program, a device and a storage medium for this purpose.