Multiplexer-Based Wafer Test Channel Reassignment
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Solution Overview
Problem
In semiconductor testing, when one integrated circuit fails during simultaneous testing, the tester channels dedicated to it remain idle until the test sequence is completed for the remaining 'good' circuits, wasting time and reducing throughput, as there is no efficient method to collect process characterization data from local test sites during this period.
Innovation Solution
The method involves using a multiplexer to switch the tester channels from the failed integrated circuit to adjacent process characterization test sites after failure detection, allowing for data collection before the remaining circuits complete their testing, without requiring additional tester channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel testing of multiple integrated circuits is implemented to increase wafer throughput, then productivity improves, but tester channels remain idle after a failure is detected, causing loss of time
Solution Approach 1:
The patent applies the principle of continuity of useful action by redirecting tester channels from failed integrated circuits to process characterization test sites immediately after failure detection. This ensures that tester channels continue to perform useful measurements (collecting process characterization data) during the time period that would otherwise be idle, thereby eliminating wasted time while maintaining parallel testing operations.
Solution Approach 2:
The patent uses process characterization test sites as intermediary structures that enable continued utilization of tester channels. These test sites act as mediators between the failure detection event and the data collection process, allowing the system to transition smoothly from testing integrated circuits to characterizing process parameters without interrupting the testing workflow or leaving channels idle.
2Productivity
If additional tester channels are added to test more integrated circuits simultaneously, then productivity improves, but device complexity and cost increase
Solution Approach 1:
The patent applies universality by enabling existing tester channels to serve multiple functions: first for testing integrated circuits, and then for collecting process characterization data from test sites. This multi-functionality allows the system to increase testing capacity without adding more physical tester channels, as the same channels are reused for different purposes during different time periods within the parallel testing framework.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the collection of accurate process characterization data during the idle time, improving wafer throughput by utilizing existing tester channels and enhancing failure analysis by correlating electrical characteristics with the failure mode.
Implementation Method 1
each multiplexer having an output terminal and a select control input terminal, the multiplexer operable to selectively provide an electrical pathway between either an IC contact terminal or a process characterization test site contact terminal and the multiplexer output terminal
Data Source
AI summary
Collecting process characterization data local to a failed integrated circuit (IC), includes providing a wafer having ICs, each IC having contact terminals, the wafer having process characterization test sites distributed across it such that at least one process characterization test site is adjacent each IC; selecting two or more ICs for simultaneous testing; for each of those ICs, coupling two or more contact terminals of the selected IC, and a corresponding two or more contact terminals of an associated test site to corresponding input terminals of a multiplexer, each multiplexer having an output terminal and a select control input terminal, the multiplexer operable to selectively provide an electrical pathway between either an IC contact terminal or a test site contact terminal and the multiplexer output terminal; coupling the output terminal of each multiplexer to a tester channel; operating the multiplexer so that its output terminal is coupled to the IC contact terminal; simultaneously testing two or more ICs; detecting a failure of at least one of the selected ICs prior to completion of testing the remaining ICs simultaneously being tested; subsequent to detecting the failure, operating the multiplexer so that its output terminal is coupled to the test site contact terminal; and collecting process characterization data prior to completion of testing the remaining ICs.