Wafer Test Pad Structure for Mark-Free Flat Probe Contact

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Solution Overview

Problem

Current wafer testing methods using needle probe tips are inefficient due to high precision requirements, short usable life, and the tendency to leave marks on test pads, which complicates downstream processing.

Innovation Solution

The use of flat probe tips in conjunction with a seed layer and a sacrificial test pad made of a soft metallic material like tin, allowing for secure electrical contact without leaving marks on the test pads, and subsequent removal of the sacrificial test pad after testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If needle probe tips are used for wafer testing, then secure electrical contact is achieved, but manufacturing cost increases and maintenance difficulty increases

Engineering Contradiction:
Improveelectrical contact reliabilityVSAvoidprobe tip manufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs disposable flat probe tips that are inexpensive to manufacture and replace. These flat tips are designed to be used once or limited times and then discarded, eliminating the need for expensive, maintainable needle tips. The flat probe tips achieve sufficient electrical contact for testing while being economically feasible as single-use components.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Reliability

If needle probe tips are used for wafer testing, then electrical contact is established, but probe marks are left on test pads complicating downstream processing

Engineering Contradiction:
Improveelectrical contactVSAvoidprobe marks on test pads
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a removable sacrificial test pad layer that is placed over the actual test pads during testing. The needle probes contact this sacrificial layer instead of the permanent test pads, extracting the harmful contact function from the test pad structure itself. After testing, the sacrificial pad is removed, leaving no marks on the underlying test pads.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The sacrificial test pad acts as an intermediary layer between the needle probes and the actual test pads. This mediator absorbs the mechanical contact and potential damage, allowing electrical testing to proceed without directly contacting the permanent test pad structures that would otherwise be marked or damaged.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If flat probe tips are used for wafer testing, then manufacturing cost decreases and maintenance ease increases, but they can only contact soft materials limiting applicability

Engineering Contradiction:
Improveprobe tip manufacturing costVSAvoidmaterial compatibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The sacrificial test pad serves as an intermediary with soft material properties that enables flat probe tips to effectively test hard semiconductor structures. The flat tips contact the soft sacrificial pad material, which deforms to accommodate the flat tip geometry and ensures good electrical contact, while the underlying hard test pad structures remain unaffected.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the material parameter of the test pad interface by introducing a sacrificial layer with different mechanical properties (softer material) over the hard semiconductor test pads. This parameter change allows flat probe tips to make effective contact by interacting with the softer sacrificial material rather than directly with the hard semiconductor substrate.

Inventive Principle:
Principle #35Parameter changes

4Measurement precision

If wafer testing is performed with traditional methods, then device performance is evaluated, but test time is long and throughput is low

Engineering Contradiction:
Improvedevice performance evaluationVSAvoidwafer testing throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The sacrificial test pad is pre-positioned on the wafer before the testing process begins. This preliminary preparation eliminates the need for complex probe tip positioning and adjustment during testing, allowing flat probe tips to make immediate contact and significantly reducing test setup time while maintaining measurement precision.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12205853B2Integrated circuit test method and structure thereof
Publication Date: 2025.01.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12205853B2 patent drawing
  • US12205853B2 patent drawing
  • US12205853B2 patent drawing

AI summary

A semiconductor device includes a semiconductor die. The semiconductor die includes a device layer, an interconnect layer over the device layer, a conductive pad over the interconnect layer, a conductive seed layer directly on the conductive pad, and a passivation layer encapsulating the conductive pad and the conductive seed layer. The conductive pad is between the interconnect layer and the conductive seed layer.