Wafer Test Time Prediction for Efficient Transfer Scheduling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In test systems where multiple testers simultaneously test wafers, the varying test times due to different electrical characteristics of wafers lead to inefficiencies in transfer schedules, limiting the operation rate of testers.
Innovation Solution
A prediction device that calculates and predicts test times for wafers based on past test times, allowing for the prediction of test end times and the generation of efficient transfer schedules for the transfer section.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transfer section starts operations based on notification from the tester after test completion, then the system operates simply without prediction, but the operation rate of the tester is limited due to waiting time
Solution Approach 1:
The prediction device performs preliminary actions by calculating and predicting the test end time before the actual test completes. The calculation unit computes test time length based on electrical characteristics, and the end time prediction unit predicts when the test will end, allowing the transfer section to prepare in advance rather than waiting passively for notification.
Solution Approach 2:
The prediction device acts as an intermediary between the tester and the transfer section. Instead of the transfer section directly waiting for tester notification, the prediction device receives test start information, calculates predicted end time, and provides this information to the transfer section, enabling proactive scheduling.
2Ease of manufacture
If the same test program is executed for all wafers, then the test process is standardized and simple, but the test time varies significantly due to different electrical characteristics of wafers
Solution Approach 1:
The prediction device applies local quality by customizing the predicted test end time for each individual wafer based on its specific electrical characteristics. While the test program remains standardized, the prediction is tailored to each wafer's properties (test voltage, test current, number of circuits), allowing optimized transfer scheduling for each case.
Solution Approach 2:
The calculation unit changes parameters by computing test time length based on varying electrical characteristics of each wafer (test voltage, test current, number of circuits to be tested). This allows the system to maintain standardized test procedures while adapting the predicted duration to each wafer's specific parameters.
Data Source
AI summary
Information for realizing an efficient transfer schedule by the transfer section is provided. A prediction device includes a calculation unit configured to calculate a test time length when a test of a wafer has been performed by a tester; a test time prediction unit configured to predict a current test time length based on past test time lengths calculated by the calculation unit; an end time prediction unit configured to predict, when a start time of a test of a test target wafer by the tester is acquired, an end time of the test of the test target wafer based on the predicted test time length; and a storage unit configured to store at least the predicted test time length and the predicted end time in a readable manner.


