Multisite Parallel Wafer Tester Mobile Alignment Carriage
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Solution Overview
Problem
Current semiconductor wafer testing equipment is inefficient and costly due to the need for multiple test site visits and high die count wafers, which increases operational expenses.
Innovation Solution
A multisite parallel wafer tester with a mobile wafer handling and alignment carriage, wafer rotation pre-alignment assembly, wafer alignment assembly, wafer FOUP, and wafer camera assembly, allowing for simultaneous testing across a two-dimensional array of test sites using a single wafer handling robot and probe card assembly with a floating chuck, enabling efficient alignment and testing of multiple wafers in parallel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single wafer handling robot and alignment carriage are used to service multiple test sites, then device complexity and cost are reduced, but productivity decreases due to sequential wafer handling across test sites
Solution Approach 1:
The alignment carriage is made mobile and can be dynamically repositioned to different test sites along the array, rather than being fixed at one location. This allows a single alignment carriage to service multiple test sites sequentially, reducing the total number of alignment carriages needed while maintaining the ability to perform parallel testing across multiple sites.
Solution Approach 2:
The single alignment carriage is designed to perform multiple functions by servicing different test sites at different times. It can load wafers, align them, and service multiple probe cards across the array, making one unit perform the work that would traditionally require multiple dedicated alignment carriages at each test site.
2Productivity
If multiple test sites are used for parallel wafer testing, then productivity increases, but device complexity and cost increase due to multiple wafer handling systems
Solution Approach 1:
The alignment carriage is designed to move dynamically along the array of test sites, allowing a single unit to service multiple locations. This dynamic positioning capability enables parallel testing across multiple sites without requiring a proportional increase in alignment carriages, thus reducing overall system complexity.
Solution Approach 2:
Instead of having alignment carriages distributed across each test site in a two-dimensional array, the system uses a single alignment carriage that moves along the array in one dimension. This dimensional reorganization allows one unit to service multiple sites, reducing the number of alignment carriages from potentially many to just one.
3Quantity of substance
If high die count wafers are tested, then the number of touchdowns required increases, but testing time and cost increase proportionally
Solution Approach 1:
The probe card is designed with multiple test engines that can continuously test multiple dies simultaneously in a single touchdown. The system maintains continuous useful action by testing all accessible dies across the wafer surface during one contact, eliminating the need for multiple sequential touchdowns and reducing total testing time despite high die counts.
Solution Approach 2:
The probe card extends across a large area to cover more of the wafer surface in a single touchdown. By increasing the spatial coverage in the two-dimensional plane of the probe card, the system can access and test more dies simultaneously, reducing the number of touchdowns needed even for high die count wafers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly reduces testing costs by allowing multiple wafers to be tested in one operation, maintaining efficiency even with high die count wafers, and providing precise alignment and testing capabilities across a large number of test sites without the need for additional test site visits.
Implementation Method 1
A wafer probe card assembly contains a multistage seal and combines with the floating chuck to create a vacuum test chamber.
Data Source
AI summary
The invention is a cost effective multisite parallel wafer tester that has an array of stationary wafer test sites; a single mobile wafer handling and alignment carriage that holds a wafer handling robot, a wafer rotation pre-alignment assembly, a wafer alignment assembly, a wafer front opening unified pod (FOUP), and a wafer camera assembly; and a robot that moves the wafer handling and alignment carriage to and from each test site. Each test site contains a wafer probe card assembly and a floating chuck. In use, wafers are loaded from a front opening FOUP into a wafer buffer FOUP from which wafers are retrieved by the wafer handling and alignment assembly. The robot positions the wafer handling and alignment carriage and the associated wafer handling robot, the wafer rotation pre-alignment assembly, the wafer alignment assembly, the wafer FOUP, and the wafer camera assembly in front of and inside a given test site and aligns the wafer to be tested with the probe card inside the test site using the floating chuck.