Wafer Testing Pattern Layout for Early Die Screening
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Solution Overview
Problem
The increasing complexity and miniaturization of semiconductor devices pose challenges in manufacturing, requiring improved methods for testing and manufacturing to enhance device robustness, reduce costs, and shorten processing times.
Innovation Solution
A method involving the formation of integrated circuits and testing patterns over a wafer using a semiconductor fabrication process, followed by the use of a testing module to perform electrical tests on the patterns, which serves as an early sanity check before final interconnection and singulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If testing is performed after final interconnection and singulation, then manufacturing precision is maintained, but loss of time and productivity are increased
Solution Approach 1:
The patent implements preliminary testing by forming a testing module and performing electrical tests on the wafer before the final interconnection structure is formed and before singulation. This early testing action identifies defective dies at an earlier stage, allowing them to be removed before completing all manufacturing steps, thereby reducing rework and improving overall productivity while maintaining manufacturing precision.
2Loss of time
If testing is performed early in the production line, then loss of time is reduced, but device complexity increases
Solution Approach 1:
The patent segments the wafer into multiple regions, with a dedicated testing module region separate from the functional die regions. The testing module is formed in a specific region of the wafer and includes testing pads and interconnection structures that are distinct from the functional devices. This segmentation allows independent testing operations without affecting the complexity of the functional device design.
Solution Approach 2:
The patent introduces a dedicated testing module as an intermediary structure that facilitates early testing. The testing module includes testing pads, testing interconnection structures, and access openings that serve as intermediaries between the test equipment and the functional devices. This intermediary structure enables testing without requiring modification of the functional device architecture.
3Manufacturing precision
If testing module is formed with same fabrication process as integrated circuit, then manufacturing precision is maintained, but device complexity increases
Solution Approach 1:
The patent merges the formation of the testing module with the existing integrated circuit fabrication process. The testing module is formed using the same thin film deposition, patterning, and etching processes that are already in place for creating the functional devices. By combining these operations into a single integrated process flow, the patent maintains manufacturing precision through process consistency while avoiding the need for separate dedicated testing module fabrication equipment or processes.
Data Source
AI summary
A method includes forming an integrated circuit and a testing pattern over a die region of a wafer and a scribe line region of the wafer, respectively, in which the integrated circuit and the testing pattern are formed by a same fabrication process; connecting a via of a testing chip to a testing pad of the testing pattern; performing a testing process to the die region by detecting electrical properties of the testing pattern through the testing chip; after the testing process is completed, forming an interconnection structure over the integrated circuit, in which the interconnection structure includes conductive features electrically connected to the integrated circuit; and after the interconnection structure is formed over the integrated circuit performing an singulation process through the scribe line region of the wafer, such that the die region of the wafer is singulated into an individual die.