Semiconductor Wafer Testing Pad Relocation
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Solution Overview
Problem
Conventional semiconductor wafers require thick dicing lines to accommodate testing pads, which complicates measurement processes and extends testing time.
Innovation Solution
The semiconductor wafer design includes pads on the semiconductor chips instead of the dicing line, allowing terminals of identical potential to be connected via wiring, enabling simultaneous measurements without thickening the dicing line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If pads for testing are provided on the dicing line, then simultaneous measurements can be achieved and wafer measuring time can be shortened, but the dicing line has to be thickened
Solution Approach 1:
The testing pads are extracted from the dicing line and relocated to the semiconductor chips themselves. This allows the dicing line to remain thin while still enabling simultaneous measurement of multiple terminals through wiring connections on the chip surface.
Solution Approach 2:
The testing pads are moved from the one-dimensional dicing line structure to the two-dimensional chip surface, allowing multiple pads to be distributed across the chip area. This dimensional shift enables simultaneous measurements without requiring increased dicing line thickness.
2Productivity
If pads for testing are provided on the dicing line, then simultaneous measurements can be achieved, but layout complexity increases
Solution Approach 1:
By extracting the testing pads from the dicing line and placing them on the chip, the layout complexity of the dicing line is reduced. The pads can be strategically positioned on the chip surface to simplify routing and reduce interference, while still enabling simultaneous measurements.
3Productivity
If pads for testing are provided on the dicing line, then simultaneous measurements can be achieved, but additional probes and pads are required increasing costs
Solution Approach 1:
The wiring structure on the chip serves multiple functions: it connects terminals for their primary circuit function and simultaneously serves as the testing path for measurement. This multi-functionality eliminates the need for separate dedicated test pads and probes, reducing the quantity of components required while maintaining simultaneous measurement capability.
Data Source
AI summary
A semiconductor wafer includes semiconductor chips divided by a dicing line, one of the semiconductor chips including terminals of an identical potential; a wiring located on the dicing line, and electrically connecting the terminals to each other; and a pad electrically connected through the wiring to the terminals, wherein the pad is located entirely on the semiconductor chip and is not present on the dicing line.