Semiconductor Wafer Thinning via Isotropic Etching Grooves
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Solution Overview
Problem
Current semiconductor manufacturing methods face challenges in efficiently removing damaged layers and minimizing stress concentration during wafer thinning and dicing processes, leading to potential device breakage and reduced reliability.
Innovation Solution
A method involving the formation of non-penetrating grooves on both the active and rear surfaces of semiconductor wafers, followed by isotropic etching to connect these grooves and divide the wafer into individual devices, which mitigates stress concentration and facilitates efficient removal of damaged layers, using techniques like spin etching and dry etching with protective resin layers to prevent damage to active surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If back grind processing is performed to thin semiconductor wafers, then wafer thinning is achieved, but damaged layers with minute fissures are formed on the rear surface
Solution Approach 1:
The patent removes the damaged layer formed during back grind processing through selective etching. The etching process targets and extracts the damaged portion containing minute fissures from the semiconductor wafer rear surface, leaving the intact crystal structure below. This extraction eliminates the harmful damaged layer while preserving the functional wafer structure.
Solution Approach 2:
The patent performs preliminary removal of the damaged layer before subsequent dicing processing. By eliminating the damaged layer with fissures in advance, the patent prevents stress concentration and crack propagation that would occur during mechanical dicing operations, thereby avoiding complete device breakage.
2Productivity
If dicing processing is performed to divide semiconductor wafers, then individual devices are manufactured, but minute cracking and chipping are generated on the cut surface
Solution Approach 1:
The patent removes the damaged layer containing potential crack initiation sites before dicing. By extracting this compromised material layer through selective etching, the remaining wafer structure is free from pre-existing fissures that would propagate during mechanical cutting, thereby preventing cracking and chipping during dicing operations.
Solution Approach 2:
The patent performs preliminary damaged layer removal as a preparatory step before dicing. This preliminary action eliminates the root cause of cracking and chipping, allowing subsequent dicing to proceed without generating defects on the cut surfaces of individual devices.
3Weight of moving object
If semiconductor wafer is thinned to reduce electronic product weight, then weight reduction is achieved, but excessive stress concentrates on cracked portions causing device breakage
Solution Approach 1:
The patent extracts the damaged layer containing minute fissures from the thinned wafer structure. By removing these defect-containing layers, the patent eliminates stress concentration points that would lead to device breakage under the reduced structural mass, thereby maintaining strength despite thinning.
Solution Approach 2:
The patent performs preliminary removal of damaged layers before final thinning and dicing operations. This ensures that the thinned wafer structure is free from internal defects that would act as stress concentrators, preventing device breakage while achieving the desired weight reduction through thinning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces stress concentration, enhances the strength of semiconductor devices, and improves handling and processing efficiency by uniformly thinning wafers while protecting semiconductor elements from etching damage.
Implementation Method 1
decreasing a thickness of the semiconductor wafer, connecting the first groove and the second groove, and dividing each of the semiconductor regions from the semiconductor wafer by executing isotropic etching to the rear surface of the semiconductor wafer
Implementation Method 2
using techniques like spin etching
Implementation Method 3
using techniques like spin etching and dry etching with protective resin layers to prevent damage to active surfaces
Data Source
AI summary
A manufacturing method for a semiconductor device, includes: preparing a semiconductor wafer having an active surface and a rear surface; forming a plurality of semiconductor regions, each of which having semiconductor elements formed on the active surface of the semiconductor wafer; forming cutting regions on the outer periphery of the semiconductor regions on the active surface of the semiconductor wafer; forming, on the cutting region, a first groove which does not penetrate the semiconductor wafer; forming, on the rear surface of the semiconductor wafer, a second groove which does not penetrate to the first groove in the position corresponding to the cutting region; decreasing a thickness of the semiconductor wafer, connecting the first groove and the second groove, and dividing each of the semiconductor regions from the semiconductor wafer by executing isotropic etching to the rear surface of the semiconductor wafer; and obtaining a plurality of individual semiconductor devices.