Semiconductor Wafer Through-Hole Electrode Formation
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Solution Overview
Problem
Current methods for three-dimensionally stacked semiconductor chips, such as wire bonding, face challenges with long wiring lengths, high inductance, and increased manufacturing costs due to the need for complex wiring and new process developments, particularly when forming through-hole electrodes, which are time-consuming and difficult to achieve uniformly.
Innovation Solution
A semiconductor wafer manufacturing method involving the formation of tubular trenches with insulating and conducting films, followed by electrolytic plating, allows for the creation of through-hole electrodes with reduced manufacturing costs and shorter turnaround times, applicable to large-sized wafers, by eliminating the need for dry etching and simplifying the process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wire bonding is used to connect stacked semiconductor chips, then ease of manufacture is improved, but inductance increases and high-speed transmission becomes difficult
Solution Approach 1:
The patent segments the connection path by forming separate through-hole electrodes for different signal types (I/O signals, power signals, ground signals) at different locations on the chip. This segmentation allows each signal type to have its own optimized connection path, reducing overall inductance while maintaining ease of manufacture through standardized hole formation processes.
Solution Approach 2:
The patent transitions from planar wire bonding to three-dimensional through-hole electrodes that penetrate the chip thickness direction. This dimensional change enables direct vertical connections between stacked chips, significantly reducing connection length and inductance while maintaining manufacturing feasibility through established via formation techniques.
2Manufacturing precision
If through-hole electrodes are formed by dry etching, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts the complex dry etching process from the manufacturing flow and replaces it with simpler wet etching or laser drilling methods. This extraction maintains the precision needed for through-hole formation while eliminating the complexity and cost associated with dry etching equipment and process control.
Solution Approach 2:
The patent employs disposable or simple reusable tools such as laser drill bits or wet etch solutions instead of expensive, complex dry etching systems. These simpler methods achieve sufficient precision for through-hole electrode formation without requiring costly infrastructure, reducing both device complexity and manufacturing cost.
3Manufacturing precision
If plate filling is used to form through-hole electrodes, then manufacturing precision is improved, but loss of time increases due to lengthy plating development
Solution Approach 1:
The patent performs preliminary actions by pre-forming the through-hole structures and applying conductive materials in a way that eliminates the need for lengthy plating development. The conductive plugs are formed directly during chip fabrication using methods such as electroplating with optimized parameters, chemical vapor deposition, or screen printing, thereby achieving precise electrode formation without time-consuming subsequent plating steps.
4Ease of operation
If wire bonding is used for electrical connection, then ease of operation is improved, but connection length increases and yield decreases
Solution Approach 1:
The patent inverts the conventional connection approach by forming through-hole electrodes that protrude from the chip surface, allowing upper chips to be directly connected to lower chips without requiring wire bonding from the package substrate. This inversion of the connection paradigm reduces connection length and improves yield while maintaining ease of operation through direct chip-to-chip bonding.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of through-hole electrodes at low cost and in short time, reducing inductance and increasing the efficiency of high-speed transmission, while avoiding the complexity and cost associated with traditional methods, and is suitable for large-sized wafers.
Implementation Method 1
electrolytic plating, allows for the creation of through-hole electrodes
Data Source
AI summary
A semiconductor wafer comprising: a tubular trench formed at a position to form a through-hole electrode of a wafer; an insulating member buried inside the trench and on an upper surface of the trench; a gate electrode film and a metal film formed on an upper surface of the insulating member; a multilevel columnar wiring via formed on an upper surface of the metal film; and an external connection electrode formed electrically connected to the metal film via the multilevel columnar wiring via. In this manner, it is unnecessary to have a new process of dry etching to form a through-hole electrode after thinning the wafer and equipment development. Moreover, introduction of a specific design enables formation of through-hole electrodes with significantly reduced difficulties of respective processes.