Wafer Transfer Scheduling for Semiconductor Process Modules
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Solution Overview
Problem
In semiconductor manufacturing, the use of dummy wafers to maintain processing conditions leads to inefficiencies and increased turn-around time due to the need for additional wafers in processing modules, especially when processing lots with fewer wafers than the module capacity.
Innovation Solution
A semiconductor manufacturing apparatus with a scheduler and transfer controller that creates a transfer plan to replace dummy wafers with product wafers from subsequent lots having the same processing conditions, ensuring efficient wafer utilization and reduced dummy wafer usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy wafers are used to replenish wafer shortage in process modules, then the processing condition uniformity is maintained, but the turn-around time increases and operational efficiency decreases
Solution Approach 1:
The system recovers and reuses wafers from subsequent lots that have the same processing conditions as dummy wafers. Instead of discarding these wafers or using separate dummy wafers, the scheduler identifies and transfers available wafers from post-lots to replace dummy wafers in advance-lot processing groups, thereby reducing turn-around time while maintaining processing uniformity
Solution Approach 2:
The scheduler performs preliminary planning to identify post-lots with matching processing conditions before the advance-lot processing is complete. By pre-arranging the replacement wafer supply from subsequent lots, the system avoids waiting time and ensures continuous processing without interruption, thus reducing overall turn-around time
2Productivity
If dummy wafers are used to maintain the same number of wafers in process modules, then processing efficiency is maintained, but the number of wafers to be managed increases
Solution Approach 1:
Wafers from subsequent lots serve multiple functions: they are both the product wafers for their own lot and replacement wafers for previous lots with matching processing conditions. This multi-functionality allows the system to maintain processing efficiency without increasing the total number of wafers, as the same wafers fulfill dual purposes across different processing timelines
3Loss of time
If product wafers from post-lots are used to replace dummy wafers, then the turn-around time is reduced, but the scheduling complexity increases
Solution Approach 1:
The scheduler continuously monitors the processing status of multiple lots and uses feedback information about which post-lots have the same processing conditions as advance-lots. This feedback mechanism enables the scheduler to dynamically identify suitable wafer replacement opportunities and adjust transfer plans accordingly, reducing turn-around time through informed decision-making
Solution Approach 2:
The scheduling system segments the wafer transfer problem into manageable units by grouping lots with identical processing conditions. This segmentation allows the scheduler to handle replacement decisions for each group independently, reducing overall scheduling complexity while still achieving time reduction benefits across the entire system
Data Source
AI summary
A semiconductor manufacturing apparatus includes one or more process modules, a scheduler, and a transfer controller. A product wafer of a lot that is transferred from a load port to one of the one or more process modules is replenished such that a total number of wafers that are simultaneously processed in the one or more process modules becomes N. When an advance lot being processed and a post lot to be processed subsequent to the advance lot have a same processing condition, the scheduler creates the transfer plan to replenish with the product wafer of the post lot instead of a dummy wafer such that the transfer controller transfers the product wafer and the dummy wafer to the one or more process modules according to the created transfer plan.