Semiconductor Wafer Trenching and Backside Metallization
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Solution Overview
Problem
Current semiconductor wafer separation methods often result in damaged wafers with chipped edges, reduced breaking strength, and the inability to metallize the backside of chips due to mechanical instability post-grinding, especially with thin wafers and those having backside metallization layers.
Innovation Solution
A method involving forming trenches in the kerf regions of semiconductor workpieces by etching from one side, mounting with a carrier, thinning from the other side to open the trenches, and applying a metallization layer on the thinned side, which allows for backside metallization and mechanical stability during processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional separation methods (mechanical sawing, etching, laser dicing) are used, then wafer separation can be achieved, but wafer damage occurs including sidewall chipping and reduced breaking strength
Solution Approach 1:
The method performs preliminary trench formation in the kerf regions before the actual dicing operation. By pre-removing material and creating controlled trenches that extend partially through the wafer thickness, the subsequent dicing process encounters reduced resistance and causes less chipping and damage to the wafer edges and sidewalls.
Solution Approach 2:
The separation process is divided into multiple stages: first forming trenches in the kerf regions, then performing the actual dicing. This segmentation allows the harmful effects to be concentrated in the kerf areas rather than affecting the entire wafer structure, preserving the integrity of the semiconductor devices.
2Productivity
If large spacing regions (dicing streets) are used for wafer separation, then separation can be achieved, but the amount of semiconductor wafer material available for active regions is reduced
Solution Approach 1:
The invention changes the physical parameters of the separation process by forming deep trenches that extend through most of the wafer thickness. This allows the use of narrower kerf regions compared to conventional methods, as the trenches provide sufficient separation and structural support with less lateral spacing, thereby increasing the active area of the wafer.
3Productivity
If DBG (dicing before grinding) process is used with foil application, then separation can be achieved, but mechanical stability is insufficient for subsequent handling and metallization
Solution Approach 1:
The invention introduces a carrier substrate as an intermediary that provides mechanical support to the thinned wafer. The carrier holds the wafer in a stable configuration during subsequent processing steps including metallization, eliminating the mechanical instability issues associated with foil-based DBG methods.
4Stability of the object's composition
If conventional carrier-technique methods with rigid carrier and liquid glue are used, then handling stability is improved, but glue cannot be removed from chipped sidewalls
Solution Approach 1:
The method performs preliminary trench formation and wafer thinning before mounting to the carrier. By preparing the wafer structure in advance with clean, well-defined trenches and reduced thickness, the subsequent mounting process uses minimal adhesive that can be easily removed, and any residual adhesive can be cleanly eliminated without damaging the semiconductor structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes damage to the wafers, maintains mechanical stability for backside metallization, and enhances the breaking strength of semiconductor chips by reducing the need for large spacing regions and preventing adhesive penetration into the trenches.
Implementation Method 1
forming one or more trenches in the workpiece by removing material from the one or more kerf regions
Implementation Method 2
thinning the workpiece from a second side of the workpiece
Implementation Method 3
forming a metallization layer over the second side of the workpiece after thinning the workpiece
Data Source
AI summary
Methods for processing a semiconductor workpiece can include providing a semiconductor workpiece that includes one or more kerf regions; forming one or more trenches in the workpiece by removing material from the one or more kerf regions from a first side of the workpiece; mounting the workpiece with the first side to a carrier; thinning the workpiece from a second side of the workpiece; and forming a metallization layer over the second side of the workpiece.