Semiconductor Wafer Warping Prevention via Controlled Thermal Gradient
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Solution Overview
Problem
The silicon wafer substrate warping during the transferring process to the epitaxial growth furnace leads to thermal stress inconsistencies, resulting in defects such as large size particles on the epitaxial growth layer, which are detrimental to semiconductor device quality, especially with larger diameter wafers.
Innovation Solution
The method involves controlling the leaving time, transferring temperature, and output ratio between front and back surface heating means to maximize the temperature difference between the wafer's front and back surfaces before placing the substrate on the susceptor, thereby preventing warping and reducing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the silicon wafer substrate is transferred from the buffer chamber to the epitaxial growth furnace which is preheated to a high temperature, then the heating efficiency is improved and the epitaxial growth can be performed at optimal temperature, but the silicon wafer substrate suffers from sudden temperature change causing thermal stress inconsistency and warping
Solution Approach 1:
The patent applies preliminary action by preheating the buffer chamber to a temperature close to the epitaxial growth furnace temperature before transferring the wafer. This gradual temperature equalization prevents sudden thermal stress and warping while maintaining heating efficiency for the epitaxial growth process.
2Productivity
If the silicon wafer substrate is placed on the susceptor by transferring into the preheated furnace, then the productivity is improved by reducing transfer time, but the warping causes scratches and particles on the wafer surface
Solution Approach 1:
The buffer chamber is preheated to a temperature close to the epitaxial growth furnace temperature before wafer transfer. This preliminary heating action allows faster transfer without causing warping, thus improving productivity while maintaining wafer surface quality by preventing contact-induced scratches and particles.
3Stability of the object's composition
If the heating lamps are turned off to keep the furnace at low temperature during transfer, then the wafer warping is prevented, but the epitaxial growth process is delayed
Solution Approach 1:
The buffer chamber is preheated in advance to a temperature close to the epitaxial growth furnace temperature. This preliminary action allows the wafer to be transferred without causing thermal shock and warping, while the furnace can immediately begin heating for epitaxial growth without delay, thus resolving both wafer flatness and heating time requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses dust generation due to warping, enhancing the quality of both the semiconductor wafer and the semiconductor device by minimizing large size particle defects on the epitaxial growth layer.
Implementation Method 1
the interior of the epitaxial growth furnace is previously heated to a certain temperature (transferring temperature) by lamp heating
Implementation Method 2
the silicon wafer substrate is heated by lamp heating up to a temperature (>1100° C.) suitable for vapor phase growth
Implementation Method 3
the silicon wafer substrate suffers from a sudden temperature change to form a sudden temperature gradient, causing an inconsistency of a thermal stress
Data Source
AI summary
A method and an apparatus for manufacturing a semiconductor wafer are provided for improving a quality of the semiconductor wafer, and further, for improving a quality of a semiconductor device manufactured by using the semiconductor wafer, by preventing warping from being generated at a stage of a placing step, at the time of performing heat treatment to a semiconductor wafer substrate. The placing process is performed by a placing means so that a time when a temperature difference between a wafer front surface temperature and a wafer rear surface temperature becomes maximum, and a time when warping is generated in the wafer are prior to a time when the wafer is brought into contact with lift pins or a susceptor (i.e., a time after the temperature is at an upper limit value of an infrared temperature region at 600° C.), and the lift pins are brought into contact with the wafer rear surface.


