Wafer Weak-Point Inspection Using Real-Time Review Recipes
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Solution Overview
Problem
Existing semiconductor inspection tools face challenges in achieving high throughput while maintaining sensitivity, particularly in detecting defects on wafers, as current methods require full wafer inspections that are time-consuming and inefficient.
Innovation Solution
Implementing a high-resolution SEM with a SORIL objective lens, smart review sampling filter, and universal defect identification unit to perform focused inspections on critical 'weak points' defined by a wafer map, enabling self-learning and adaptive inspection plans.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If full wafer inspection is performed, then defect detection coverage is improved, but inspection throughput deteriorates
Solution Approach 1:
The wafer inspection process is segmented into two phases: an initial full wafer inspection to build a defect map, followed by focused inspections on identified weak points. This segmentation allows the system to achieve high defect detection coverage while improving throughput by avoiding redundant full wafer re-inspections.
Solution Approach 2:
The system performs preliminary full wafer inspection to create a defect map before subsequent inspections. This preliminary action identifies weak points that guide future inspections, enabling the system to focus resources on critical areas and significantly improve throughput without sacrificing detection coverage.
2Productivity
If focused inspection on weak points is implemented, then inspection throughput is improved, but defect detection coverage may deteriorate
Solution Approach 1:
The system uses feedback from initial full wafer inspections to dynamically adjust subsequent inspection strategies. The defect map generated from preliminary inspections provides feedback that guides focused inspections, ensuring that weak points are accurately identified and re-inspected, thereby maintaining high defect detection coverage while improving throughput.
Solution Approach 2:
The inspection strategy is made dynamic by adapting the inspection scope based on identified weak points. The system transitions from static full wafer inspection to dynamic focused inspection, adjusting the inspection area and parameters based on real-time defect map analysis, thus optimizing both throughput and detection coverage.
3Measurement precision
If high-resolution SEM is used, then measurement precision is improved, but inspection time increases
Solution Approach 1:
High-resolution SEM inspection is applied locally only to identified weak points rather than uniformly across the entire wafer. This local quality approach maintains high measurement precision for critical areas while significantly reducing total inspection time by avoiding high-resolution scanning of defect-free regions.
Solution Approach 2:
The system performs partial high-resolution inspection only where necessary (at weak points) rather than excessive full-wafer high-resolution scanning. This partial action principle applies high-resolution SEM selectively to critical areas, achieving the needed measurement precision while minimizing time loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances inspection throughput by concentrating efforts on defect-prone areas, while accumulating knowledge for improved future inspections, thus optimizing resource utilization and yield management.
Implementation Method 1
a charged particle beam inspection/review tool
Data Source
AI summary
Method and machine utilizes the real-time recipe to perform weak point inspection on a series of wafers during the fabrication of integrated circuits. Each real-time recipe essentially corresponds to a practical fabrication history of a wafer to be examined and/or the examination results of at least one examined wafer of same “lot”. Therefore, different wafers can be examined by using different recipes where each recipe corresponds to a specific condition of a wafer to be examined, even these wafers are received by a machine for examining at the same time.


