In-Fab Wafer Yield Prediction Using Virtual Process Paths

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Solution Overview

Problem

Existing methods for predicting the yield of in-fab wafers are inaccurate due to the inability to consider processed and measured data at the individual wafer level, and they only predict yields in LOT units, making it impossible to predict wafer unit yields effectively.

Innovation Solution

A method involving the generation of a virtual process path for in-fab wafers using data from fab-out wafers, where a yield predicting model is trained with supervised learning to predict yields based on this virtual path, allowing for precise prediction of individual wafer yields.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If yield prediction is performed in LOT units using quantified yield-related factors, then the prediction process can be simplified, but the accuracy of yield prediction deteriorates because individual wafer data cannot be considered

Engineering Contradiction:
Improveprediction process simplicityVSAvoidyield prediction accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The invention segments the yield prediction from LOT-level aggregation to individual wafer-level analysis. By processing each wafer's specific process data and measurement data separately through the neural network, the system achieves both individualized prediction accuracy and maintains computational feasibility through automated processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention creates a virtual copy of the actual fabrication process through simulated process paths generated by the neural network. These virtual process paths replicate the characteristics of real wafer processing, allowing accurate yield prediction without requiring physical experimentation on actual wafers.

Inventive Principle:
Principle #26Copying

2Measurement precision

If individual wafer data is processed to improve yield prediction accuracy, then the prediction precision improves, but the computational complexity and data processing requirements increase

Engineering Contradiction:
Improveyield prediction accuracyVSAvoiddata processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The invention replaces traditional statistical methods and manual analysis with a neural network-based system. The neural network automatically processes individual wafer data, process parameters, and measurement results, substituting complex computational mechanics with an intelligent system that learns optimal prediction patterns from training data.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The neural network system is self-training and self-optimizing. It automatically learns from historical wafer data and improves its prediction accuracy over time without requiring manual intervention for parameter tuning or model restructuring.

Inventive Principle:
Principle #25Self-service

3Productivity

If traditional yield prediction methods are used with quantified yield-related factors, then the processing time is reduced, but the ability to optimize individual wafer processes is lost

Engineering Contradiction:
Improveprocessing speedVSAvoidindividual wafer optimization capability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The system performs preliminary analysis of individual wafer characteristics and process paths before final yield determination. By predicting yield early in the fabrication process at the individual wafer level, the system enables proactive process adjustments and optimizations before defects occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention introduces dynamic, adaptive prediction at the individual wafer level rather than static LOT-level predictions. The neural network adapts to each wafer's specific process history and characteristics, enabling real-time optimization decisions for individual wafers while maintaining high processing throughput.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4550069A1Method and device for predicting yield of in-fab wafer
Publication Date: 2025.05.07 SAMSUNG ELECTRONICS CO LTD
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AI summary

A method and a device for predicting a yield of an in-fab wafer including: generating at least one virtual process path on a residual process of the in-fab wafer; and predicting the yield of a virtual fab-out wafer that corresponds to the at least one virtual process path by using a trained yield predicting model are provided.