Persistent Wait Instruction Conversion for Multiprocessor Systems

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Solution Overview

Problem

In loosely coupled multiprocessor systems with different operating systems, persistent waiting commands can lead to malfunctions due to accumulation and delayed responses, especially when one OS is abnormally terminated and restarts, causing inefficiencies in communication and processing.

Innovation Solution

A second controller converts persistent waiting commands from a first controller into periodic commands, which are then output to devices, ensuring timely responses and preventing malfunctions by using a shorter communication path through the system bus and input/output units, thereby facilitating efficient inter-OS communication and operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a persistent waiting instruction is used to wait for a response from a control target, then the waiting is continuous and reliable, but the system resource consumption increases and response time is delayed due to accumulation of waiting instructions

Engineering Contradiction:
Improvewaiting reliabilityVSAvoidresponse time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent converts persistent waiting instructions into periodic waiting instructions that are issued at predetermined time intervals. The waiting instruction conversion unit transforms continuous waiting requests into discrete periodic commands, which are then sent to the control target. This periodic approach maintains reliable waiting functionality while preventing accumulation of waiting instructions and reducing system resource consumption, thereby improving response time without sacrificing reliability.

Inventive Principle:
Principle #19Periodic action

2Reliability

If persistent waiting instructions are accumulated in the system, then continuous monitoring is maintained, but system efficiency decreases and malfunctions occur due to abnormal termination and restart of operating systems

Engineering Contradiction:
Improvemonitoring continuityVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements a conversion mechanism that transforms persistent waiting instructions into periodic waiting instructions before they are executed. By performing this conversion in advance, the system prevents accumulation of waiting instructions that could cause malfunctions during OS abnormal termination and restart scenarios. The periodic instruction approach maintains monitoring continuity while improving processing efficiency by eliminating the problematic accumulation effect.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If communication path through first controller is used for waiting instructions, then inter-OS communication is maintained, but communication time increases due to longer path through second controller

Engineering Contradiction:
Improveinter-OS communicationVSAvoidcommunication speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent introduces a waiting instruction conversion unit as an intermediary component that resides in the first controller. This conversion unit transforms persistent waiting instructions into periodic waiting instructions before they are transmitted through the communication path to the second controller and control target. By performing the conversion at the source (first controller) rather than at the destination, the patent maintains the necessary inter-OS communication adaptability while reducing communication time, as the converted periodic instructions are more efficient and require less processing time in the communication path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9753728B2Apparatus and medium for converting a persistent wait instruction to an instruction for periodically waiting for a control target
Publication Date: 2017.09.05 FUJIFILM BUSINESS INNOVATION CORP
  • US9753728B2 patent drawing
  • US9753728B2 patent drawing
  • US9753728B2 patent drawing

AI summary

An information processing apparatus includes a first controller that is controlled by a first operating system and a second controller that is controlled by a second operating system different from the first operating system. The first controller outputs a waiting instruction waiting persistently until a response is transmitted from a control target. The second controller converts the waiting instruction outputted from the first controller into a periodic instruction waiting periodically until a response is transmitted from the control target, and outputs the periodic instruction to the control target.