Inter-Processor Wake-Limiting Link for Power Management
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Solution Overview
Problem
Existing PCIe technologies consume significant power and lack effective power management infrastructure, making them unsuitable for portable consumer electronics where power conservation is critical.
Innovation Solution
Implementing an inter-processor communication link that limits wake requests to a second device when the first device is in a lower power state, using a method that determines whether to send a wake request based on previous requests and power state changes, thereby optimizing power consumption and reducing unnecessary power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If PCIe technology is used for high-speed data communication, then data throughput is improved, but power consumption increases significantly
Solution Approach 1:
The patent implements dynamic power management by allowing processors to transition between different power states (awake, sleep, deep sleep) based on activity levels. The system dynamically adjusts communication link states and wake request behaviors to match actual data transfer needs, enabling high throughput when necessary while conserving power during idle periods
Solution Approach 2:
The patent changes operational parameters by introducing wake request limiting mechanisms that adjust the frequency and conditions of wake requests based on power state transitions. By modifying the parameters of wake request behavior (thresholds, rates, conditions), the system optimizes the balance between maintaining data communication capability and reducing power consumption
2Speed
If wake requests are sent frequently to maintain data communication readiness, then data transfer responsiveness is improved, but power consumption increases
Solution Approach 1:
The patent implements periodic wake request patterns rather than continuous or frequent requests. By establishing rhythmic, controlled intervals for wake requests based on power state transitions and data transfer needs, the system maintains necessary communication responsiveness while avoiding excessive power consumption from constant wake-up cycles
Solution Approach 2:
The patent applies partial action by sending wake requests only when necessary rather than continuously. The wake request limiting mechanism determines the minimum sufficient frequency of wake requests needed to maintain data communication capability, avoiding excessive wake requests that would consume unnecessary power
3Reliability
If processors remain in awake state to handle data transfers, then data communication reliability is improved, but power consumption increases
Solution Approach 1:
The patent prepares for data transfers by implementing wake request mechanisms that can quickly transition processors from sleep to awake states when data transfer is needed. The wake request limiting logic pre-establishes the conditions and protocols for reliable wake-up, ensuring that data communication reliability is maintained through controlled, timely wake transitions rather than continuous awake operation
Data Source
AI summary
Methods and apparatus for limiting wake requests from one device to one or more other devices. In one embodiment, the requests are from a peripheral processor to a host processor within an electronic device such as a mobile smartphone or tablet which has power consumption requirements or considerations associated therewith. In one implementation, the peripheral processor includes a wake-limiting procedure encoded in e.g., its software or firmware, the procedure mitigating or preventing continuous and/or overly repetitive “wake” requests from the peripheral processor.