Walking Lower Metal Power Grid Layout for IR Drop and Routing Congestion
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Solution Overview
Problem
Existing power distribution networks in integrated circuits face challenges in balancing IR drop and routing congestion, often requiring increased silicon area and complicating signal routing.
Innovation Solution
The implementation of automated power grid methodologies with flexible walking lower metal patterns, including multiple rows of voltage rails and elongated metal stubs in alternating sequences, coupled via metal-filled vias to reduce IR drop and congestion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If long metal stripes are used to reduce IR drop, then power distribution performance is improved, but metal tracks available for signal routing are reduced, increasing congestion
Solution Approach 1:
The patent transitions from traditional horizontal metal stripe patterns to vertical metal stub configurations that extend perpendicular to the voltage rails. This dimensional change allows power distribution to occur in a different spatial orientation, reducing interference with horizontal signal routing paths and thereby decreasing routing congestion while maintaining power delivery effectiveness
Solution Approach 2:
The continuous metal stripes are segmented into discrete metal stubs that are strategically positioned at via locations. Each stub is individually optimized for its specific power distribution function, allowing better integration with the routing grid and reducing overall congestion compared to long continuous metal strips
2Reliability
If large vias are used to reduce IR drop, then power distribution performance is improved, but silicon area is increased
Solution Approach 1:
The patent combines the via structure with the metal stub to form an integrated power distribution element. The metal stub extends from the via, merging the vertical via connection with the horizontal power distribution function, thereby reducing the overall silicon footprint compared to using large vias alone with additional metal coverage
3Reliability
If alternating sequence of supply voltage tracks and reference voltage tracks is implemented, then power distribution performance is improved, but device complexity is increased
Solution Approach 1:
The patent implements a dynamic alternating pattern where metal stubs are selectively positioned based on the alternating sequence of supply voltage and reference voltage tracks. This dynamic configuration optimizes the power distribution network to adapt to the alternating voltage pattern, improving performance while managing complexity through systematic placement rules
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for reduced IR drop, grid resistance, and routing congestion, effectively eliminating the trade-off between these factors and enabling more efficient use of silicon area.
Implementation Method 1
coupled to respective ones of the voltage rails via metal-filled vias of one or more dielectric layers
Data Source
AI summary
Embodiments herein describe techniques for automated power grid methodologies with flexible walking lower metal patterns. In an example, an integrated circuit (IC) device includes multiple rows of voltage rails, including supply voltage rails and reference voltage rails, and a first column of elongated metal stubs, perpendicular to the rows of voltage rails, coupled to respective ones of the voltage rails via metal-filled vias of one or more dielectric layers to provide corresponding supply voltage stubs and reference voltage stubs, which may be arranged in an alternating sequence of supply voltage stubs and reference voltage stubs.