Wall Electrode Slit Configuration for IPS LCD Yield
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Solution Overview
Problem
The existing liquid crystal display devices face challenges in achieving optimal planar distribution of the wall structure and electrodes, particularly in the wall electrode mode IPS, which affects the manufacturing process and yield, leading to issues with transmittance and viewing angle characteristics.
Innovation Solution
The proposed solution involves a liquid crystal display device with a matrix of pixels, each having an insulator wall structure, a wall electrode, a continuous source electrode, and common electrodes, where the slit that forms the border between adjacent pixels is selectively disposed on the top of the wall structure, optimizing the processing conditions to maintain consistent height and improve yield, and enhancing transmittance beyond current IPS modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If slits are distributed on both top of wall structure and flat portion for collectively processing, then manufacturing process is simplified, but thickness variation of resist causes overetching on wall structure and underetching on flat portion
Solution Approach 1:
The patent divides the slit distribution into two distinct regions: slits on the wall structure top surface and slits on the flat portion. This segmentation allows different etching conditions to be applied to each region, preventing overetching on the wall structure while ensuring proper etching on the flat portion, thus resolving the precision issue while maintaining simplified collective processing.
Solution Approach 2:
The patent applies different slit width specifications to different locations: slits on the wall structure top have a first width, while slits on the flat portion have a second width. This local quality approach compensates for the resist thickness variation, ensuring consistent etching results across different regions without compromising manufacturing simplicity.
2Manufacturing precision
If mask slit width is reduced to prevent overetching on wall structure, then etching precision improves, but slit may not properly form on flat portion
Solution Approach 1:
The patent specifies different slit widths for different locations: a first width for slits on the wall structure top and a second width for slits on the flat portion. This ensures that each region receives the appropriate slit width for its specific requirements, maintaining both precision and proper slit formation without compromise.
Solution Approach 2:
The patent segments the slit design into two categories based on location, allowing independent optimization of each type. This segmentation enables the mask to be designed with different slit dimensions for different regions, ensuring precise etching on the wall structure while maintaining proper slit formation on the flat portion.
3Reliability
If wall structure and electrode are perfectly aligned, then device performance improves, but planar distribution optimization becomes complex
Solution Approach 1:
The patent incorporates the wall structure's top surface into the mask design from the beginning, using it as a reference for slit positioning. This preliminary action ensures that slits are automatically and precisely aligned with the wall structure without requiring separate alignment steps, thereby maintaining high device performance while simplifying the overall design process.
Solution Approach 2:
The wall structure's top surface serves as a self-aligning reference for the mask slit positioning. By utilizing the existing wall structure geometry itself as the alignment基准, the patent eliminates the need for complex external alignment procedures, achieving perfect alignment while reducing design complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes the processing of the wall electrode mode IPS, ensuring consistent slit formation and improved yield, while achieving higher transmittance compared to current IPS modes, thereby addressing the challenges of planar distribution and manufacturing efficiency.
Implementation Method 1
an intensity of a backlight is controlled by applying an electric field which is parallel to a substrate to rotate a liquid crystal director in a plane of the liquid crystal layer
Implementation Method 2
rotate a liquid crystal director in a plane of the liquid crystal layer, thereby displaying an image
Implementation Method 3
a photo process of a transparent electrode (ITO electrode) becomes an issue
Data Source
AI summary
In a wall electrode liquid crystal display device, planar distribution of the wall structure and the electrode is optimized to improve a yield. A liquid crystal display device includes a plurality of pixels arranged in a matrix, each of the pixels having an insulator wall structure formed at a border of pixels, a wall electrode formed at a side surface of the wall structure of the border of the pixels, a source electrode which is continuous with the wall electrode and formed of a planar electrode extending in a planar direction, a first common electrode provided between source electrodes at both sides of the pixel to form a retentive capacitance, and a second common electrode provided between wall electrodes on both sides of the pixel. A slit which becomes a border of the wall electrodes of two adjacent pixels is disposed only on a top of the wall structure.