Wireless Access Point Exception Handling via Selective RAM Imaging
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Solution Overview
Problem
In wireless access points (WAPs) compliant with IEEE 802.11ax standards, the large size of RAM exceeds the capacity of persistence storage, making it impossible to store a complete image of RAM during exceptions, which hampers effective exception handling due to limited flash memory.
Innovation Solution
Implementing a selective memory imaging process where the main processor identifies and saves only the relevant virtual RAM segment associated with the co-processor that generated the exception, allowing the image of this segment to be stored in persistence storage for analysis, rather than attempting to save the entire RAM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If the entire RAM is imaged and stored in persistence storage during an exception, then complete exception analysis information is available, but the persistence storage capacity is exceeded due to large RAM size
Solution Approach 1:
The patent divides the large RAM into multiple virtual RAM segments, each associated with a specific co-processor. When an exception occurs, only the relevant virtual RAM segment is imaged and stored in persistence storage, rather than imaging the entire RAM. This segmentation approach reduces the storage requirement from gigabytes to manageable sizes while preserving all necessary exception analysis information.
Solution Approach 2:
The patent extracts and stores only the relevant portion of RAM data needed for exception analysis. By identifying which virtual RAM segment contains the exception information and storing only that segment, the system removes unnecessary data from the storage process, solving the capacity constraint while maintaining analytical completeness.
2Productivity
If multiple co-processors are incorporated to offload tasks from the main processor, then network throughput and performance are improved, but the complexity of exception handling increases due to multiple potential exception sources
Solution Approach 1:
The patent assigns each co-processor its own dedicated virtual RAM segment, creating a clear separation between co-processor memory spaces. When an exception occurs, the system can quickly identify which co-processor caused it by checking which virtual RAM segment contains the exception, and then image only that specific segment. This eliminates the need to analyze all co-processor memories simultaneously, reducing exception handling complexity while maintaining multi-co-processor performance benefits.
Solution Approach 2:
The patent introduces a memory management intermediary layer that maps co-processors to their respective virtual RAM segments. This intermediary structure allows the system to handle exceptions from multiple co-processors efficiently by providing a clear lookup mechanism that identifies the relevant memory segment without requiring complex analysis of all co-processor states.
Data Source
AI summary
Example method includes: allocating, by a main processor of a wireless access point (WAP) comprising at least the main processor and a plurality of co-processors wherein the main processor and the plurality of co-processors both have access to a random-access memory (RAM) co-located within the WAP, a dedicated non-overlapping segment of the RAM to each of the plurality of the co-processors; receiving, by the main processor of the WAP, a notification from one of the plurality of co-processors indicating that an exception previously defined by the one of the plurality of co-processors has occurred; determining, by the main processor of the WAP, the dedicated non-overlapping segment of the RAM allocated to the one of the plurality of co-processors; and saving, by the main processor of the WAP, the dedicated non-overlapping segment of the RAM allocated to the one of the plurality of co-processors to a fast access memory.