Warning Track Interruption for Virtual CPU Resource Management

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Solution Overview

Problem

In virtual computing environments, guest CPUs often face issues where they are left in an inactive state due to expired timeslices, leading to potential delays in continuation, as they must wait for their specific guest CPU to receive its next timeslice, even if other available guest CPUs could run the dispatchable unit, due to saved state incompatibility.

Innovation Solution

A warning track interruption facility is introduced, providing a grace period to guest programs to complete or move dispatchable units, allowing them to prepare for potential state changes and ensuring continuity by notifying them of impending resource loss, enabling voluntary exit and maintaining system fairness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a guest CPU timeslice expires, then the host CPU can be allocated to other guest CPUs, but the dispatchable unit must wait for the same guest CPU to become available again, causing delays

Engineering Contradiction:
Improveresource utilization efficiencyVSAvoiddispatchable unit waiting time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by saving the complete guest CPU state (registers, program counter, condition codes) to a data structure in memory before the timeslice expires. This allows the dispatchable unit to be quickly restored and resumed on a different guest CPU without waiting for the original CPU to become available, thereby reducing waiting time while maintaining resource utilization efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism (state saving data structure and context switching facility) that mediates between the expired timeslice and the next available guest CPU. This intermediary allows the dispatchable unit to be transferred to another guest CPU by preserving its state, resolving the contradiction between resource allocation flexibility and execution continuity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the guest CPU state is saved and restored using linkage techniques, then the guest can be suspended and resumed, but the dispatchable unit cannot be continued on a different guest CPU due to state incompatibility

Engineering Contradiction:
Improveguest CPU flexibilityVSAvoidstate management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal state representation that can be used across different guest CPUs. By saving the guest CPU state to a standardized data structure that captures all necessary execution context (registers, program counter, condition codes), the system enables the same dispatchable unit to be resumed on any available guest CPU, not just the original one, thereby increasing flexibility while managing complexity through standardization

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2805235B1Warning track interruption facility
Publication Date: 2019.12.25 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • EP2805235B1 patent drawingFigure 1~2
  • EP2805235B1 patent drawingFigure 3
  • EP2805235B1 patent drawingFigure 4

AI summary

A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup.