Watchdog-Guided Memory Reset for Busy-Stuck Recovery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Nonvolatile memories experience a 'busy stuck' phenomenon due to internal operation errors, preventing subsequent operations and necessitating technology to safely exit this state.
Innovation Solution
A memory system incorporating a watchdog circuit to detect reset operation failures, a reset control circuit to protect data, and a reset fail treatment circuit to activate a reset signal, ensuring safe reset operations by discharging memory lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a reset operation is performed to exit the busy stuck state, then the memory can resume normal operations, but data in the memory cells may be lost or corrupted during the reset process
Solution Approach 1:
The patent applies preliminary action by performing a protection operation before the reset operation. Specifically, the reset control circuit activates a protection signal that prevents data in the memory cells from being affected by the subsequent reset operation, thereby preserving data integrity while allowing the reset to proceed and exit the busy stuck state
Solution Approach 2:
The patent implements beforehand cushioning by introducing a protection mechanism that cushions against potential data loss. The protection operation is activated in advance of the reset operation, creating a protective barrier that prevents harmful effects on stored data while the reset process resolves the busy stuck state
2Productivity
If the reset signal is activated immediately to resolve the busy stuck state, then the memory can return to normal operation faster, but data protection may be compromised
Solution Approach 1:
The patent applies preliminary action by activating the protection signal before activating the reset signal. The reset control circuit is configured to first activate the protection signal in response to detecting a busy stuck state, and then subsequently activate the reset signal, ensuring data protection is in place before the reset operation begins
Solution Approach 2:
The patent implements feedback through the watchdog circuit that monitors the memory's operational state. When the watchdog circuit detects a busy stuck state, it provides feedback to the reset control circuit, which then sequences the activation of protection and reset signals appropriately, creating a closed-loop control system that ensures both speed and safety
Data Source
AI summary
A memory may include: a cell string including memory cells connected between a bit line and a source line; a watchdog circuit detecting a failing of a reset operation as a fail; and a reset control circuit controlling an operation that protects data of the memory cells in response to the detection of the fail by the watchdog circuit and activating a reset signal.


