Watchdog Processor Monitoring With Time Window Evaluation

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Solution Overview

Problem

Existing watchdog systems for processor monitoring in safety-critical vehicle systems, such as airbags, are inadequate for complex systems as they either fail to differentiate between transient errors and malfunctions or escalate errors unnecessarily, leading to inappropriate countermeasures.

Innovation Solution

A method where a watchdog evaluates processor information for completeness, content, and timing within predetermined time windows, assigning GOOD or NOT events based on strict criteria, and only triggers error messages when specific thresholds of GOOD or NOT events are met, allowing for more nuanced assessment and reduced false positives.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If an up/down counter is used to monitor processor behavior, then load control is improved, but measurement precision deteriorates due to low-pass filtering effect that integrates oscillating results

Engineering Contradiction:
Improveload control capabilityVSAvoiddetection accuracy of transient errors
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent segments the monitoring period into discrete evaluation periods with start and end points. Each evaluation period independently assesses whether the processor executed instructions within expected time windows, preventing integration of oscillating results across periods while maintaining load control through selective continuation or termination of evaluation based on threshold comparisons.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic threshold comparison where the measured duration is compared against expected minimum and maximum durations. The evaluation period can be dynamically continued or terminated based on whether intermediate results fall within acceptable ranges, allowing adaptive response to processor behavior without fixed integration of all oscillating data points.

Inventive Principle:
Principle #15Dynamics

2Reliability

If strict error triggering is applied to ensure safety, then reliability is improved, but false positives increase leading to unnecessary error escalation

Engineering Contradiction:
Improvesafety monitoringVSAvoidfalse error escalation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent performs preliminary assessment by measuring the actual duration of processor instruction execution and comparing it against pre-defined expected minimum and maximum durations before triggering errors. This preliminary validation within evaluation periods filters out transient anomalies that fall within acceptable ranges, preventing false error escalation while maintaining safety for genuine deviations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through continuous monitoring of processor behavior against expected time windows. The system provides feedback by comparing measured durations with thresholds and adjusts error triggering based on whether deviations exceed acceptable limits, distinguishing between transient errors and genuine malfunctions to prevent unnecessary escalation.

Inventive Principle:
Principle #23Feedback

3Device complexity

If simple incremental error counting is used, then device complexity is reduced, but adaptability deteriorates for complex systems requiring load control

Engineering Contradiction:
Improvemonitoring system structureVSAvoidload control capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent segments monitoring into discrete evaluation periods with clear start and end points, where each period independently evaluates processor behavior. This segmentation provides a structured framework that maintains relative simplicity while enabling load control through threshold-based continuation or termination of evaluation, making the system adaptable to complex requirements without proportionally increasing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs periodic evaluation periods to assess processor behavior at regular intervals. This periodic structure provides a systematic approach to load control where evaluation can be continued or terminated based on threshold comparisons, offering adaptability for complex systems while maintaining a relatively simple periodic monitoring framework rather than continuous complex analysis.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentEP3761179B1Method for testing the function of a processor by a watchdog
Publication Date: 2023.10.11 ELMOS SEMICON AG

AI summary

In the process for verifying a processor's functionality using a watchdog, the watchdog evaluates information received from the processor with regard to both its content and the time of its receipt. The watchdog classifies information received from the processor as a "good" event if both the information is correct and the watchdog receives this correct information within a predefined expectation time window. The watchdog classifies information received from the processor as a "no" event if the information is incorrect or missing, and/or if the watchdog receives incorrect information or correct information outside a predefined expectation time window (i.e., before or after the expected time window).The watchdog only triggers an error message if the watchdog evaluates the information it receives from the processor in M ​​sequential expectation time windows, where M is a natural number greater than 1, as a non-event more than N times, where N is less than M.