Watchdog Timer Mode Segmentation for Optimized Recovery

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Solution Overview

Problem

Existing watchdog timer devices do not individually optimize the processes for generating interrupts and reset signals, leading to inefficient monitoring and recovery processing times, as the same timeout times and clear signals are used for both operations.

Innovation Solution

A watchdog timer device with a mode setting unit that distinguishes between two modes: one for monitoring operation states and generating interrupts, and another for monitoring recovery processing and generating resets, using different logic and timeout times for each mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the same timeout time is used for both first timeout (monitoring operation state) and second timeout (recovery processing), then the device complexity is reduced, but the productivity is worsened because the processing times cannot be individually optimized

Engineering Contradiction:
Improvetimeout time configurationVSAvoidmonitoring and recovery processing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent divides the single timeout time into two separate timeout times: first timeout time for monitoring operation state and generating interrupt, and second timeout time for monitoring recovery processing and generating reset. This segmentation allows each timeout to be independently optimized for its specific function, resolving the contradiction between device complexity and processing efficiency.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If the same clear signal is used for both first count and second count, then the ease of operation is improved, but the reliability is worsened because recovery processing may not be completed before reset occurs

Engineering Contradiction:
Improveclear signal operationVSAvoidrecovery processing completion
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent introduces separate clear signals: first clear signal for clearing the first count (interrupt monitoring) and second clear signal for clearing the second count (recovery monitoring). This segmentation ensures that the recovery processing timeout is not prematurely cleared, allowing sufficient time for recovery while maintaining operational clarity through dedicated clear signals for each function.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If a single logic is used for both interrupt generation and reset generation, then the device complexity is reduced, but the productivity is worsened because each process cannot be individually optimized

Engineering Contradiction:
Improvelogic structureVSAvoidinterrupt and reset processing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements separate logic paths: first logic for determining first timeout and generating interrupt signals, and second logic for determining second timeout and generating reset signals. This logical segmentation enables independent optimization of interrupt handling and recovery monitoring processes, improving overall system productivity while maintaining manageable complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12093118B2Watchdog timer device
Publication Date: 2024.09.17 SANKEN ELECTRIC CO LTD
  • US12093118B2 patent drawing
  • US12093118B2 patent drawing
  • US12093118B2 patent drawing

AI summary

A watchdog timer device according to one or more embodiments may include a mode setting unit that sets a first mode or a second mode. In the first mode, the watchdog timer device monitors an operation state of a monitored device and generates an interrupt signal to cause the monitored device to perform recovery processing at a first timeout. In the second mode, the watchdog timer device monitors the recovery processing and generates a reset signal to restart the monitored device at a second timeout. The watchdog timer device uses different logic to execute determining the first timeout in the first mode and determining the second timeout in the second mode.