Watchdog Timer Control for Processor Reset

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Solution Overview

Problem

Conventional watchdog timers suspend their function during low current consumption operation modes, preventing processors from switching back to regular operation modes when in a runaway state, leading to potential inability to reset.

Innovation Solution

A processor control apparatus and method that includes a watchdog timer, current monitor, and current amplifier to suspend and restart the watchdog timer based on power supply current levels, ensuring the processor can reset from low current consumption to regular operation modes while minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the watchdog timer is suspended during low current consumption operation mode, then power consumption is reduced, but the processor cannot be reset when returning to regular operation mode from a runaway state

Engineering Contradiction:
Improvepower consumptionVSAvoidprocessor reset capability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The watchdog timer's operational state is dynamically adjusted based on the processor's operation mode. The current monitor detects transitions between low current consumption mode and regular operation mode, automatically activating or suspending the watchdog timer accordingly. This dynamic adaptation resolves the contradiction by making the watchdog timer operational only when needed (regular mode) while suspending it during low power mode to reduce consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

A current amplifier is introduced as an intermediary component between the power supply and the watchdog timer. When the processor transitions to regular operation mode, the current amplifier increases the power supply output current to a level that activates the watchdog timer. This intermediary mechanism enables reliable processor reset capability during regular operation while allowing power suspension during low current consumption mode.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the watchdog timer operates continuously, then the processor can be reset in any state, but power consumption increases during low current consumption operation mode

Engineering Contradiction:
Improveprocessor reset capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The system dynamically controls the watchdog timer's operation based on real-time detection of processor operation modes. The current monitor continuously monitors power supply current and adjusts watchdog timer status accordingly - suspending during low current consumption mode to save power, and activating during regular operation mode to ensure reset capability. This dynamic control resolves the contradiction between continuous reliability and power efficiency.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The power supply output current parameter is changed based on operation mode. During low current consumption mode, the power supply operates at reduced current levels, naturally suspending the watchdog timer. When transitioning to regular operation mode, the current amplifier increases the power supply current parameter, which activates the watchdog timer. This parameter change strategy enables the system to achieve both power savings and reliable reset capability at appropriate times.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9904352B2Processor control apparatus and processor control method
Publication Date: 2018.02.27 CALSONIC KANSEI CORP
  • US9904352B2 patent drawing
  • US9904352B2 patent drawing
  • US9904352B2 patent drawing

AI summary

A control apparatus and control method for a processor can reset the processor when the processor returns from low current consumption operation mode to regular operation mode. The control apparatus (11) for a processor (10) includes a watchdog timer (20) that resets the processor (10) when a P-RUN signal from the processor (10) cannot be acquired for a predetermined time, a current monitor (19) that suspends operation of the watchdog timer (20) when output current of a power supply (18) that supplies power to the processor (10) falls below a predetermined value and starts operation of the watchdog timer (20) when the output current becomes equal to or greater than the predetermined value, and a current amplifier (21) that increases the output current to be equal to or greater than the predetermined value upon acquiring a signal for causing the processor (10) to start operating in the regular operation mode.