Wave-Bottom Well Structure for RF Power HVMOS Performance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing RF power amplifiers face challenges in balancing cost and performance, particularly in achieving efficient high voltage metal-oxide-semiconductor (HVMOS) devices for wireless communication systems.
Innovation Solution
The development of a semiconductor device with a semiconductor substrate, a gate structure, and a first well region having a tunable doping concentration, where the first well region overlaps the gate structure and has a wave bottom surface, allowing for adjustable performance characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional well regions with fixed doping concentration are used, then manufacturing process is simple, but performance (on resistance, breakdown voltage, capacitance) cannot be optimized
Solution Approach 1:
The well region bottom surface is designed with curved profiles including wave bottom surfaces and arc bottoms instead of flat surfaces. This curvature enables improved performance characteristics such as enhanced on resistance, breakdown voltage, and capacitance while maintaining compatibility with standard manufacturing processes.
Solution Approach 2:
The doping concentration in the well region is made tunable and non-uniform, with different concentrations at different locations (indicated by first number and second number of arc bottoms). This local variation in doping concentration allows optimization of performance parameters without requiring additional manufacturing masks or process steps.
2Reliability
If additional masks or process steps are added to optimize well region doping, then performance can be improved, but manufacturing cost increases
Solution Approach 1:
The doping concentration parameter in the well region is made tunable within a range (first number and second number of arc bottoms), allowing performance optimization without changing the fundamental manufacturing process. This parameter adjustment is achieved through existing process capabilities, avoiding additional masks or process steps and thus controlling manufacturing costs.
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, a gate structure and a first well region. The gate structure is disposed on the semiconductor substrate. The first well region having a first conductivity type is located in the semiconductor substrate. The first well region overlaps the gate structure. A first bottom of the first well region has a wave bottom surface.


