Wave-Patterned Conductive Bumps for Crack-Resistant IC Packaging

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Solution Overview

Problem

In packaged integrated circuits, conductive bumps often decouple from the mold or develop cracks, leading to increased on-resistance due to inadequate mechanical coupling with the integrated circuit package mold.

Innovation Solution

The conductive bumps are fabricated with a wave or interlocking pattern profile, which enhances mechanical coupling by increasing the surface area of contact with the mold, thereby preventing delamination and crack formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive bumps are formed with conventional smooth profiles, then manufacturing is simple, but mechanical coupling with the mold is inadequate leading to decoupling and cracks

Engineering Contradiction:
Improvemechanical couplingVSAvoidbump profile complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive bump is formed with a wave pattern profile instead of a smooth cylindrical shape. This curvature variation creates an interlocking mechanism with the mold cavity, where the wave peaks and valleys mechanically engage with the mold surface, preventing decoupling and crack formation while maintaining manufacturing feasibility through standard electroplating processes

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The invention transitions from a two-dimensional smooth surface to a three-dimensional wave patterned surface on the conductive bump. This additional dimensional complexity in the radial direction creates multiple contact points with the mold, significantly enhancing mechanical coupling without requiring changes to the fundamental bump structure or assembly process

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If conductive bumps have smooth profiles, then manufacturing process is simple, but surface area of contact with mold is insufficient

Engineering Contradiction:
Improvecontact surface areaVSAvoidmanufacturing complexity
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The wave pattern profile increases the surface area of the conductive bump through radial undulations. The crests and troughs of the wave pattern create additional contact interfaces with the mold cavity, effectively increasing the contact surface area without requiring a larger overall bump diameter, thus maintaining electrical performance while enhancing mechanical coupling

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Reliability

If conventional conductive bumps are used, then on-resistance is acceptable, but decoupling and cracks increase on-resistance over time

Engineering Contradiction:
Improveelectrical connection stabilityVSAvoidcrack formation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The wave patterned profile provides preemptive mechanical interlocking with the mold cavity, creating a buffer against thermal expansion, contraction, and mechanical stress that would otherwise cause crack formation. The interlocking structure absorbs and distributes stress before it can propagate into cracks that would compromise electrical connectivity, thereby maintaining stable on-resistance over the product lifecycle

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11855027B2Integrated circuits with conductive bumps having a profile with a wave pattern
Publication Date: 2023.12.26 TEXAS INSTRUMENTS INC
  • US11855027B2 patent drawing
  • US11855027B2 patent drawing
  • US11855027B2 patent drawing

AI summary

An article of manufacture comprises: an integrated circuit having a contact; a conductive bump electrically coupled to the contact, the conductive bump having a profile with a wave pattern; a lead frame electrically coupled to the conductive bump; and an integrated circuit package mold, the integrated circuit package mold covering portions of the conductive bump and the lead frame.