Multi-Rate Waveform Capture Buffer Segmentation for Power Quality

The patent divides the single large data buffer into multiple separate circular buffers, each dedicated to a specific sample rate (e.g., one buffer for 1024 samples/cycle, another for 128 samples/cycle). This segmentation allows each buffer to be optimally sized for its specific purpose, eliminating the need to allocate memory for the largest possible buffer that would be required if a single buffer handled all sample rates.

Each circular buffer is optimized with local quality appropriate to its specific sample rate requirement. The high-resolution buffer is configured with parameters suited for capturing transient events at 1024 samples/cycle, while the low-resolution buffer is configured for capturing surge/sag waveforms at 128 samples/cycle. This local optimization ensures efficient memory usage for each specific capture mode without compromising the other.

The patent segments the data capture system into multiple independent capture paths, each with its own circular buffer configured for specific sample rates. This allows the system to capture high-resolution transient data at 1024 samples/cycle when needed, while simultaneously capturing low-resolution surge/sag data at 128 samples/cycle, thereby reducing total storage requirements compared to using high sample rate for all captures.

The system dynamically changes the sampling rate parameter based on the type of event being captured. For transient events requiring high precision, the sample rate is set to 1024 samples/cycle. For surge/sag events where lower precision is acceptable, the sample rate is reduced to 128 samples/cycle. This parameter adaptation significantly reduces storage requirements while maintaining measurement quality appropriate for each event type.

The patent eliminates the need for CPU-based data selection by segmenting the memory structure into separate circular buffers for different sample rates. Each buffer independently stores data at its designated sample rate, so the CPU simply writes to or reads from the appropriate buffer based on the capture mode, without needing to search through or filter a single large memory pool. This dramatically improves processing efficiency while maintaining data flexibility.

The circular buffer structure acts as an intermediary between the ADC and storage, automatically organizing data by sample rate before it reaches the CPU. This intermediary structure handles the complexity of multi-rate data management in hardware, freeing the CPU from the burden of identifying and selecting appropriate data points, thereby improving overall system productivity.

The patent segments the data capture system into independent parallel paths, with one circular buffer dedicated to continuous low-resolution capture at 128 samples/cycle. This dedicated buffer operates independently without requiring CPU intervention for data selection or management, allowing continuous capture over extended periods (e.g., 3 seconds or longer) while maintaining real-time processing performance.

The circular buffer structure enables continuous useful action by allowing the low-resolution capture path to operate continuously without interruption or CPU overhead. Data is continuously written to the dedicated circular buffer at the appropriate sample rate, maintaining uninterrupted capture capability for surge and sag waveform detection while preserving CPU resources for other processing tasks.