Waveform Generator Shared Memory for Multi-Channel Delay Control
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Solution Overview
Problem
Existing waveform generators in ultrasound imaging systems inefficiently manage memory resources, as each waveform channel is associated with dedicated memory, leading to suboptimal utilization and management of memory resources.
Innovation Solution
Implementing a shared memory architecture with separate areas for delay and waveform data sets, utilizing a shared area for waveform data storage and dedicated buffers for each channel, along with a signal decode circuit to generate waveform signals with specified delays and shapes, and employing a mask vector circuit to selectively load data into buffers based on a mask signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated memory is allocated for each waveform channel, then each channel has independent memory access, but memory resource utilization becomes suboptimal
Solution Approach 1:
The patent merges dedicated memory resources into a shared memory pool that serves multiple waveform channels simultaneously. The memory management circuit allocates memory resources dynamically to different channels based on their current needs, allowing multiple channels to share the same physical memory resources while maintaining independent logical access through virtual addressing and time-multiplexed control signals.
Solution Approach 2:
The shared memory structure is designed to serve multiple waveform channels universally, where a single memory pool can store waveform data for any number of channels. The memory management circuit provides multi-functional control by routing different channels' data requests to appropriate memory locations and managing data retrieval sequences, enabling one memory resource to fulfill multiple channel requirements efficiently.
2Productivity
If shared memory architecture is implemented, then memory resource utilization improves, but memory management complexity increases
Solution Approach 1:
The patent introduces a memory management circuit as an intermediary layer between the shared memory pool and multiple waveform channels. This intermediary handles all memory allocation, data retrieval scheduling, and channel routing decisions, shielding the complexity from individual channels while maximizing memory utilization. The circuit acts as a mediator that translates channel requests into optimized memory access operations.
Solution Approach 2:
The memory management circuit performs preliminary actions by pre-allocating memory buffers and preparing data retrieval sequences before actual waveform generation needs arise. It anticipates channel requirements and organizes memory content in advance, reducing real-time management complexity and enabling smoother data flow to multiple channels simultaneously.
3Adaptability or versatility
If waveform data is stored in shared memory area, then memory flexibility increases, but data access time may increase
Solution Approach 1:
The patent segments the shared memory into distinct logical regions or buffers that can be independently managed and accessed. Each waveform channel or data type can be assigned to specific memory segments, allowing parallel access to different segments without conflict. This segmentation maintains flexibility while reducing access time by enabling simultaneous data retrieval operations across multiple channels from different memory regions.
Data Source
AI summary
A signal decode circuit is coupled to a buffer for each signal channel. A memory includes a shared area configured to store waveform data sets, each waveform data set including a sequence of coded waveform values specifying waveform step states. The shared area further stores delay data sets, each delay data set including a digital delay value for each signal channel defining a delay profile. A signal pointer addresses the shared area to read one waveform data set from the memory with the sequence of coded waveform values being selectively loaded into one or more of the buffers. A delay pointer addresses the shared area to read one delay data set from the memory with the digital delay values used to control delayed actuation of the signal decode circuits to decode the sequence of coded waveform values from the buffers and generate waveform signals in accordance with the delay profile.