Circuit Simulation Waveform Graphs for Faster Timing Debug
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Solution Overview
Problem
Debugging circuit designs is time-consuming and error-prone due to the large number of signals and voltage transitions in simulation waveforms, making it difficult to identify errors such as incorrect operating frequencies, latencies, and lack of response signals.
Innovation Solution
Generating a graph representation from circuit simulation waveforms, where nodes represent signal assertions and branches represent latency, allowing for the determination of simulation properties like timing and latency information to debug the circuit design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional signal-by-signal analysis of simulation waveforms is used, then comprehensive debugging coverage is achieved, but processing time and resource usage increase significantly
Solution Approach 1:
The patent segments the complex waveform analysis task by creating graph representations that divide signals into discrete nodes and transitions into edges. This segmentation allows the debugging system to process individual signal components independently rather than analyzing entire waveforms simultaneously, reducing overall processing time while maintaining comprehensive debugging coverage through systematic analysis of each segment.
Solution Approach 2:
The patent introduces graph representations as an intermediary data structure between the raw simulation waveform and the debugging analysis. This intermediary representation transforms continuous signal waveforms into discrete graphical models with nodes and edges, enabling more efficient processing while preserving the essential timing and transition information needed for comprehensive debugging.
2Measurement precision
If detailed analysis of multiple signals and voltage transitions is performed, then debugging accuracy is improved, but device complexity and resource requirements increase
Solution Approach 1:
The patent creates graphical copies (graph representations) of the actual signal waveforms. These graph copies capture the essential characteristics of signals including timing, transitions, and relationships without requiring the full complexity of the original continuous waveform data. This copying approach maintains debugging accuracy by preserving critical information while reducing processing complexity through discrete graphical representation.
Solution Approach 2:
The patent transforms continuous waveform parameters into discrete graphical parameters. By converting continuous signal data into discrete nodes and edges with specific attributes, the system changes the parameter representation from continuous to discrete, enabling more efficient processing while maintaining the precision needed for accurate debugging through careful preservation of timing and transition information.
3Measurement precision
If sequential analysis of circuit waveforms is used, then processing accuracy is maintained, but productivity and throughput decrease
Solution Approach 1:
The patent segments waveform analysis into independent graph processing tasks that can be executed in parallel. By dividing the analysis into discrete graph representation tasks for different signals and time periods, the system enables simultaneous processing of multiple segments, thereby increasing productivity and throughput while maintaining analysis accuracy through consistent application of the graph analysis methodology to each segment.
Solution Approach 2:
The patent implements dynamic processing by allowing the graph analysis system to adaptively process different waveform segments in parallel based on available resources and priorities. This dynamic approach enables the system to maintain high accuracy through thorough analysis while improving productivity by utilizing parallel processing capabilities when resources are available and scaling back when resources are constrained.
Data Source
AI summary
A system and method for analyzes a circuit design by obtaining a circuit simulation waveform of a circuit design. The circuit simulation waveform has signals associated with one or more of a read transaction and a write transaction of the circuit design. Further a first graph representation is created from a first signal of the signals of the circuit simulation waveform. The first graph representation includes a first node corresponding to an edge of the first signal. A first simulation property of the circuit design is determined from the first graph representation, and the first simulation property is output.