Silicon Waveguides with Substrate Airgaps for Mid-Infrared Loss Reduction
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Solution Overview
Problem
Silicon waveguides in photonic chips experience signal loss due to strong absorption of electromagnetic radiation by the silicon dioxide cladding layer in the mid-infrared wavelength range, particularly starting at 3.5 μm, which affects on-chip communication and sensing applications.
Innovation Solution
A waveguide structure is fabricated using a semiconductor substrate with a device layer, a handle wafer, and a buried oxide layer, featuring epitaxial semiconductor layers and airgaps located beneath the waveguide core region to reduce signal loss, including the formation of trench isolation regions and airgaps in the device and buried oxide layers to minimize absorption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If silicon dioxide layer is used as cladding material for waveguide, then structural integrity and fabrication ease are improved, but signal loss increases due to strong absorption of electromagnetic radiation starting at 3.5 μm wavelength
Solution Approach 1:
The patent extracts the harmful silicon dioxide layer from the waveguide structure by replacing it with airgaps (low-index material) in the cladding region. This removal eliminates the absorption problem caused by SiO2 at mid-infrared wavelengths while maintaining the waveguide's structural integrity through alternative confinement mechanisms.
Solution Approach 2:
The patent changes the refractive index parameter of the cladding material from silicon dioxide (high index) to air (low index, near unity permittivity). This parameter change fundamentally alters the optical properties, reducing absorption losses in the mid-infrared range while enabling effective light confinement through the modified index contrast.
2Loss of energy
If multiple airgaps are introduced beneath the waveguide core region, then signal loss is reduced by minimizing silicon dioxide volume, but device complexity increases
Solution Approach 1:
The patent segments the cladding region into multiple discrete airgap layers positioned at different depths beneath the waveguide core. This segmentation allows selective removal of silicon dioxide from specific regions where absorption occurs most strongly, while maintaining structural support in other areas, thus reducing overall signal loss without uniformly increasing complexity throughout the entire device.
Solution Approach 2:
The patent introduces airgaps in the vertical dimension beneath the waveguide core, creating a multi-layered structure with air gaps at different z-heights. This vertical dimensionality allows the structure to minimize silicon dioxide volume in critical absorption zones while distributing the complexity across multiple layers rather than requiring complex lateral variations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The described waveguide structure reduces signal loss by minimizing the volume of silicon dioxide surrounding the waveguide core and introducing airgaps with near unity permittivity, thereby enhancing the transparency and efficiency of electromagnetic radiation transfer in the mid-infrared range.
Implementation Method 1
silicon dioxide layer cladding the waveguide strongly absorbs electromagnetic radiation starting at a wavelength of 3.5 μm in the mid-infrared wavelength range
Implementation Method 2
epitaxially growing a semiconductor layer over the device layer
Data Source
AI summary
Waveguide structures and methods of fabricating waveguide structures. The waveguide structures are formed using a semiconductor substrate that includes a device layer, a handle wafer, a buried oxide layer between the handle wafer and the device layer, and an epitaxial semiconductor layer over the device layer. First and second trench isolation regions extend through the device layer and the epitaxial semiconductor layer. The first and second trench isolation regions are spaced to define a waveguide core region comprising a section of the device layer and a section of the epitaxial semiconductor layer that are arranged between the first and second trench isolation regions. A first airgap and a second airgap are respectively located in the device layer and the buried oxide layer. The first and second airgaps are arranged beneath the waveguide core region, and the first airgap may be arranged between the second airgap and the waveguide core region.


