WCDMA Signal Timing Offset Processing Using FFT and Fractional Filters
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current signal analyzers for WCDMA systems require high sampling frequencies and excessive resource consumption to achieve 1% EVM timing synchronization, making them inefficient.
Innovation Solution
The method employs Fast Fourier Transform (FFT) and Inverse Fourier Transform (IFFT) in conjunction with a fractional RRC filter to estimate and compensate for timing offsets at a low sampling frequency, twice the WCDMA chip rate, allowing for accurate timing synchronization within 1% EVM (0.1 sample).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high sampling frequency (40 to 80 times the chip rate) is used to achieve 1% EVM timing synchronization, then timing synchronization accuracy is improved, but resource consumption and computational complexity increase excessively
Solution Approach 1:
The patent changes the sampling frequency parameter from the conventional high rate (40-80 times chip rate) to a lower rate (2 times chip rate), and compensates for the reduced sampling accuracy by introducing fractional delay filters that can precisely adjust timing offsets. This parameter change resolves the contradiction by achieving the same timing synchronization accuracy with much lower resource consumption.
Solution Approach 2:
The patent introduces fractional delay filters as intermediary components between the low-rate sampler and the timing synchronization decision logic. These filters act as mediators that enable precise timing adjustment without requiring high-speed sampling, thus resolving the contradiction between accuracy and resource consumption.
2Reliability
If a high sampling frequency is used to maintain timing synchronization within 0.1 sample, then demodulation performance is improved, but device complexity increases
Solution Approach 1:
The patent changes the sampling frequency parameter to a lower value and compensates by using fractional delay filters with adjustable tap weights. This approach maintains demodulation performance while reducing device complexity by avoiding the need for high-speed sampling hardware and associated complex synchronization logic.
Solution Approach 2:
The patent segments the timing synchronization process into two stages: coarse timing acquisition using low-rate sampling, and fine timing adjustment using fractional delay filters. This segmentation allows the system to achieve high precision without requiring the entire system to operate at high sampling rates, thereby reducing device complexity.
3Measurement precision
If over-sampling at 40 to 80 times the chip rate is performed to achieve timing synchronization, then timing offset estimation accuracy is improved, but processing time and resource consumption increase
Solution Approach 1:
The patent changes the sampling rate parameter to a lower value and compensates by using fractional delay filters that can precisely estimate timing offsets. This parameter change reduces processing time significantly while maintaining timing offset estimation accuracy through the use of filter-based interpolation methods.
Solution Approach 2:
The patent performs preliminary coarse timing acquisition using low-rate sampling, then applies fractional delay filters to achieve fine timing adjustment. This preliminary action approach allows the system to reach high precision timing synchronization faster than by using high-rate sampling throughout the entire process.
Data Source
AI summary
Provided is a method of processing a Wideband Code Division Multiple Access (WCDMA) signal timing offset for a signal analyzer. The method includes estimating an integer multiple timing offset of WCDMA baseband sample data corresponding to an amount of at least one frame; generating a frequency domain signal which is time delayed corresponding to a fractional timing offset estimation resolution after generating the frequency domain signal by performing a Fast Fourier Transform (FFT) calculation on an already-known reference signal; converting each time-delayed frequency domain signal into a time domain signal by performing an Inverse Fast Fourier Transform (IFFT) calculation on each time-delayed frequency domain signal and calculating a correlation between an input signal from a position of the integer multiple timing offset and the time domain signal; and estimating a delay time leading to a maximum correlation as a fractional timing offset.