WCSP Bump Pad Dielectric Rings to Cut Photolithography Steps
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Solution Overview
Problem
Conventional wafer chip scale packages (WCSPs) with redistribution layers (RDL) require multiple photolithography steps for forming solder bump pads, leading to assembly yield loss due to electrical shorts from seed layer residue and increased costs.
Innovation Solution
The introduction of dielectric rings, such as solder resist, polyimide, or epoxy, which are additively deposited on RDL bump pads, eliminating two photolithography steps by forming dielectric ringed solder bump pads, reducing the process to a single photolithography step for electroplating the patterned RDL.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple photolithography steps are used to form solder bump pads, then the solder bump pads can be formed with conventional processes, but assembly yield loss occurs due to electrical shorts from seed layer residue
Solution Approach 1:
The patent extracts and removes the harmful seed layer residue through a cleaning step between photolithography processes. The cleaning process specifically targets and removes residual seed layer material that would otherwise cause electrical shorts, thereby improving assembly yield while maintaining the conventional multi-step photolithography approach
Solution Approach 2:
The patent applies a protective measure by introducing a cleaning step before subsequent photolithography processes. This cleaning step acts as a preventive measure to remove seed layer residue that would otherwise cause electrical shorts in later processing steps, cushioning against potential yield loss
2Ease of manufacture
If multiple photolithography steps are used to form solder bump pads, then the RDL type WCSP can be manufactured, but the process complexity and cost increase
Solution Approach 1:
The patent segments the manufacturing process into distinct phases with a cleaning step inserted between photolithography steps. This segmentation allows for targeted removal of seed layer residue without requiring complete process redesign, maintaining manufacturability while reducing complexity through modular process organization
Solution Approach 2:
The patent performs a cleaning action preliminarily between photolithography steps to remove seed layer residue before it causes problems in subsequent steps. This preliminary cleaning action simplifies the overall process by preventing the need for more complex remediation steps later
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This simplifies the process flow, enhances yield by reducing electrical shorts, and lowers costs by eliminating two photolithography steps, thereby improving the assembly efficiency of RDL type WCSPs.
Implementation Method 1
additively depositing (e.g. inkjet printing, or screen printing) a ring of dielectric material on the bump pads
Implementation Method 2
one photolithography step, that being for the electroplating process to form the patterned RDL
Data Source
AI summary
A wafer chip-scale package (WCSP) includes a substrate including a semiconductor surface layer including circuitry configured for at least one function having at least a top metal interconnect layer thereon that includes at least one bond pad coupled to a node in the circuitry. A redistribution layer (RDL) including a bump pad is coupled by a trace to metal filled plugs through a passivation layer to the bond pad. A solder ball is on the bump pad, and a dielectric ring is on the bump pad that has an inner area that is in physical contact with the solder ball.