WCSP TVS Diode Structure for Low-Capacitance Signal Protection
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Solution Overview
Problem
Conventional TVS diode devices have high capacitance, which degrades system performance when used with high-frequency signals, and their manufacturing process is costly due to the use of lead frames, bond wires, and wire bonding.
Innovation Solution
The development of vertical diode devices formed on a semiconductor substrate without a lead frame, using a wafer-level chip scale package (WCSP) process, where diodes are coupled through the substrate and connected via stud bumps, eliminating the need for wire bonding and molding, resulting in ultra-low capacitance and reduced costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional TVS diode devices are packaged using lead frames and bond wires, then the devices can be manufactured with standard packaging processes, but the device capacitance increases and manufacturing costs rise
Solution Approach 1:
The patent removes the lead frame and bond wire components from the TVS diode package, extracting the harmful capacitive elements while retaining the essential TVS protection function through a direct die-to-board mounting approach
Solution Approach 2:
The patent transitions from a three-dimensional packaged structure with lead frames and bond wires to a two-dimensional wafer-level structure where the semiconductor die is mounted directly to the circuit board, eliminating intermediate connection elements
2Reliability
If conventional packaging with lead frames and bond wires is used, then the devices can be assembled using standard processes, but the manufacturing cost increases
Solution Approach 1:
The patent combines multiple discrete components (TVS diode, lead frame, bond wires, packaging material) into a single integrated semiconductor die structure, eliminating the need for separate assembly steps and reducing overall manufacturing cost
Solution Approach 2:
The semiconductor die serves multiple functions simultaneously: it provides the TVS protection function, acts as the mounting substrate, and provides the electrical connections, replacing the specialized functions of lead frames and bond wires
3Reliability
If conventional packaging processes are used, then the devices can be manufactured with established techniques, but the manufacturing time and complexity increase
Solution Approach 1:
The patent performs the TVS diode fabrication and packaging preparation simultaneously at the wafer level before dicing, completing multiple operations in advance that would otherwise require separate sequential steps in conventional manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The WCSP process enables TVS diodes with ultra-low capacitance, allowing high-frequency signal transmission without performance degradation and significantly reducing manufacturing costs.
Implementation Method 1
Once the voltage at the protected signal exceeds a breakdown voltage for the Zener diode, the Zener diode will enter a breakdown mode and conduct the current to ground, and clamping the voltage at the protected signal to a level that does not damage other semiconductor devices coupled to the signal
Implementation Method 2
After the transient voltage event ends, the Zener diode is again reverse biased, does not conduct current and therefore does not affect the normal operations on the signal
Data Source
AI summary
An example arrangement includes a semiconductor device having at least two vertical diode devices spaced from one another by isolation trenches. Each of the vertical diode devices includes: a first diffusion region of a first P-type or N-type conductivity formed in a device side surface of the semiconductor die, the first diffusion region extending into a first epitaxial layer of a second P-type or N-type conductivity opposite the first conductivity type; the first epitaxial layer formed over a semiconductor substrate of the first P-type or N-type conductivity. The semiconductor substrate includes a backside surface facing away from the device side surface of the semiconductor die; metal contacts on the device side surface of the semiconductor die are electrically coupled to the first diffusion region; and stud bumps formed on the metal contacts and arranged to form terminals of the semiconductor device.