Non-Volatile Memory Weak Bit Detection via Adjacent Wordline Comparison
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing data storage devices face challenges in accurately detecting and managing weak bits during operation, which can lead to data corruption and errors due to degraded floating gate transistors and program disturb effects.
Innovation Solution
A data storage device with a controller that reads and re-reads data from adjacent wordlines before programming, compares the data, and marks differing bits as soft bits for future operations, allowing for improved error handling and decoding by avoiding weak bits during re-programming and generating additional error correction codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If programming operations are performed on adjacent wordlines sequentially, then data storage capacity and programming speed are improved, but program disturb effects cause charge leakage and bit errors in previously programmed wordlines
Solution Approach 1:
The patent performs preliminary detection of weak bits in the first wordline before programming the second wordline. By identifying vulnerable cells in advance through read operations and comparison, the system can take preventive measures during subsequent programming operations, thus resolving the contradiction between maintaining high programming speed and ensuring data accuracy.
Solution Approach 2:
The patent implements a feedback mechanism where the controller reads data from the first wordline, compares it with previously stored data, identifies weak bits, and uses this information to adjust programming operations on adjacent wordlines. This feedback loop enables the system to maintain high programming speed while compensating for program disturb effects on vulnerable cells.
2Reliability
If floating gate transistor insulation degrades after program and erase cycles, then memory device durability is reduced, but detecting and managing weak bits requires additional read and compare operations
Solution Approach 1:
The patent employs a self-service approach where the memory system uses its own existing read and compare capabilities to detect weak bits during normal operation. Rather than requiring external testing equipment or complex additional circuitry, the controller leverages the memory device's intrinsic functions to identify and manage degraded cells, thus improving reliability without significantly increasing operational complexity.
Data Source
AI summary
A data storage device includes a non-volatile memory device that includes at least a first wordline having first data and a second wordline sequential and adjacent to the first wordline and a controller coupled to the non-volatile memory device. The controller is configured to receive a write command to program second data to the second wordline, read and store the first data from the first wordline a in a first location prior to programming the second data, program the second data to the second wordline, re-read and store the first data from the first wordline in a second location during the programming, compare the read first data and the re-read first data, and mark one or more bits of the first wordline that are different based on the comparing. The marked one or more bits are used as soft bits in future read and decode operations.