Weak-PUF Circuit Architecture for Rich CRPs and Lower ML Correlation

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Solution Overview

Problem

Existing weak PUF circuits have limited challenge-response pairs (CRPs), leading to high hardware expenditure and vulnerability to machine learning (ML) attacks, restricting their application scenarios and security.

Innovation Solution

A voltage mode weak-PUF circuit design incorporating four decoders, two PUF arrays, a sequential control circuit, and a voltage comparator, with PUF cells and transmission gates configured to generate a large number of CRPs while minimizing hardware expenditure and enhancing resistance to ML attacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of PUF cells is increased to generate more CRPs, then the number of challenge-response pairs increases, but the hardware expenditure increases

Engineering Contradiction:
Improvenumber of CRPsVSAvoidhardware expenditure
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The PUF array is divided into multiple banks (e.g., 4 banks), each containing PUF cells that can be independently selected through row and column address inputs. This segmentation allows the same physical PUF cells to be reconfigured to generate multiple different CRPs, increasing the number of CRPs without proportionally increasing hardware area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The PUF circuit uses dynamic address input signals to select different rows and columns of PUF cells, enabling the same hardware structure to generate different CRPs dynamically. The row address input and column address input allow flexible selection of PUF cell combinations, creating multiple CRPs from a fixed number of PUF cells.

Inventive Principle:
Principle #15Dynamics

2Quantity of substance

If strong PUF circuits are used to generate exponentially increasing CRPs, then the number of CRPs increases, but the reuse rate of hardware structures increases leading to higher correlation between CRPs

Engineering Contradiction:
Improvenumber of CRPsVSAvoidcorrelation between CRPs
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The PUF array is divided into multiple banks with independent row and column selection capabilities. This segmentation ensures that different CRPs are generated by selecting different combinations of PUF cells rather than reusing the same cells, reducing correlation between CRPs while still achieving exponential growth in CRP numbers through combinatorial selection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a bank selection dimension in addition to row and column selection. By selecting different banks based on challenge inputs, the system creates an additional degree of freedom in generating CRPs, reducing reuse rates and correlations while maintaining exponential scalability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If weak PUF circuits are used to reduce hardware expenditure, then hardware costs decrease, but the number of CRPs increases only linearly limiting application scenarios

Engineering Contradiction:
Improvehardware expenditureVSAvoidapplication scenarios
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The weak PUF circuit employs dynamic address input mechanisms with row and column selectors that enable combinatorial generation of CRPs. This dynamic selection allows a fixed small number of PUF cells to generate a large number of different CRPs through different address combinations, achieving exponential CRP growth from linear hardware growth.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The same PUF cell array serves multiple functions by being reconfigurable through different address inputs. The same physical cells can generate different CRPs for different applications (identity authentication, key generation, state verification) by changing the row and column selection patterns, making the hardware universally applicable across multiple security scenarios.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Quantity of substance

If PUF cells are reused to increase CRP generation, then the number of CRPs increases, but the reuse rate increases making the circuit vulnerable to ML attacks

Engineering Contradiction:
Improvenumber of CRPsVSAvoidvulnerability to ML attacks
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The PUF array is segmented into multiple banks with independent row and column addressing. This segmentation ensures that generating additional CRPs requires selecting different segments (banks, rows, columns) rather than reusing the same PUF cells. The segmentation strategy reduces the reuse rate of individual cells while maintaining exponential CRP generation capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

By introducing bank selection as an additional dimension alongside row and column selection, the system reduces cell reuse rates. The same physical cells are accessed less frequently because the bank dimension provides additional variability in CRP generation, making ML modeling attacks more difficult while still achieving rich CRP sets.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12417321B2Voltage mode weak-PUF circuit with rich challenge-response pairs
Publication Date: 2025.09.16 WENZHOU UNIV
  • US12417321B2 patent drawing
  • US12417321B2 patent drawing
  • US12417321B2 patent drawing

AI summary

A voltage mode weak-PUF circuit with rich challenge-response pairs comprises four decoders, two PUF arrays, a sequential control circuit and a voltage comparator. One-to-two PUF arrays are used to replace existing one-to-one PUF arrays to increase the number of challenge-response pairs by 2N times, from 2N realized by the one-to-one PUF arrays to 2N×2N, wherein N=a+b. Each PUF cell comprises m*n PUF cells and n transmission gates, and adopts a simple common-source amplifier structure formed by a first PMOS transistor, a first NMOS transistor and a second NMOS transistor, wherein any one PUF cell in one PUF array can be compared with any one PUF cell in the other PUF array to generate an output response. The number of output responses is 2N, so the proportion of the PUF cells for generating one challenge-response pair is 2N/2N=1/2N, and the reuse rate of the same PUF cell is merely 1/2N.