Wear-Aware Programming for Repurposed Memory Block Reads

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Solution Overview

Problem

Memory blocks in memory devices experience degradation due to frequent access operations, leading to increased read latency and potential wasteful retirement, reducing the sustainability and efficiency of the memory system.

Innovation Solution

Repurpose memory blocks nearing the end of their life by adjusting storage states and programming parameters, such as decreasing storage density or setting to a read-only mode, and enhancing read performance through increased programming times to maintain system sustainability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory blocks are frequently accessed, then read performance is maintained, but degradation increases leading to premature retirement

Engineering Contradiction:
Improveread performanceVSAvoidmemory block lifespan
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes programming parameters (pulse width, voltage levels) based on the memory block's lifecycle stage. For degraded blocks, it applies enhanced programming parameters to compensate for wear, allowing these blocks to maintain functionality longer and extend their usable life while preserving read performance.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system dynamically adjusts programming parameters based on the memory block's health status and access patterns. It transitions from standard programming for new blocks to enhanced programming for degraded blocks, creating a dynamic adaptation strategy that optimizes both performance and lifespan.

Inventive Principle:
Principle #15Dynamics

2Duration of action of stationary object

If storage density is decreased to extend memory block life, then sustainability improves, but storage capacity is reduced

Engineering Contradiction:
Improvememory block usabilityVSAvoidstorage density
Core Design Contradiction:
Duration of action of stationary objectVSQuantity of substance

Solution Approach 1:

Instead of decreasing storage density, the patent changes programming parameters (pulse width, voltage) to compensate for degradation. This allows degraded blocks to maintain their original storage density while extending their usable life through enhanced programming that accounts for wear-induced threshold shifts.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If read latency increases due to degradation, then block retirement is triggered, but system efficiency decreases

Engineering Contradiction:
Improveread operation reliabilityVSAvoidread latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies enhanced programming parameters to degraded blocks to compensate for wear-induced performance degradation. By adjusting pulse width and voltage levels, it maintains read latency within acceptable thresholds, preventing premature retirement and keeping blocks in the readable state longer.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12353754B2Techniques for enhanced read performance on repurposed blocks of memory cells
Publication Date: 2025.07.08 MICRON TECHNOLOGY INC
  • US12353754B2 patent drawing
  • US12353754B2 patent drawing
  • US12353754B2 patent drawing

AI summary

Methods, systems, and devices for techniques for enhanced read performance on blocks of memory cells are described. The method may involve selecting a first block of memory cells from a set of blocks of memory cells of a memory system based on a condition of the first block of memory cells being met and setting one or more programming parameters corresponding to the first block of memory cells such that the one or more programming parameters are within a threshold value of one or more programming parameters corresponding to a second block associated with a storage density different from a storage density of the first block of memory cells. Further, the method may involve performing an operation on the block of memory cells according to the one or more programming parameters.